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TIB82S105BCN PDF预览

TIB82S105BCN

更新时间: 2024-11-18 19:55:03
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 时钟输入元件光电二极管可编程逻辑
页数 文件大小 规格书
14页 306K
描述
OT PLD, 20ns, TTL, PDIP28, DIP-28

TIB82S105BCN 技术参数

生命周期:Contact Manufacturer包装说明:DIP,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.79其他特性:PROGRAMMABLE LOGIC SEQUENCER
最大时钟频率:30 MHzJESD-30 代码:R-PDIP-T28
长度:36.32 mm专用输入次数:16
I/O 线路数量:端子数量:28
最高工作温度:75 °C最低工作温度:
组织:16 DEDICATED INPUTS, 0 I/O输出函数:REGISTERED
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
可编程逻辑类型:OT PLD传播延迟:20 ns
座面最大高度:5.08 mm最大供电电压:5.25 V
最小供电电压:4.75 V标称供电电压:5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL EXTENDED端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
宽度:15.24 mmBase Number Matches:1

TIB82S105BCN 数据手册

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TIB82S105BC  
16 × 48 × 8 FIELD-PROGRAMMABLE LOGIC SEQUENCER  
WITH 3-STATE OUTPUTS OR PRESET  
SRPS025A – D2897, SEPTEMBER 1985 – REVISED NOVEMBER 1995  
N PACKAGE  
(TOP VIEW)  
50-MHz Clock Rate  
Power-On Preset of All Flip-Flops  
CLK  
I7  
V
CC  
I8  
I9  
I10  
I11  
I12  
I13  
I14  
I15  
PRE/OE  
Q0  
Q1  
Q2  
Q3  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
6-Bit Internal State Register With 8-Bit  
Output Register  
2
I6  
I5  
I4  
I3  
I2  
I1  
I0  
3
Power Dissipation . . . 600 mW Typical  
4
5
Programmable Asynchronous Preset or  
Output Control  
6
7
Functionally Equivalent to, but Faster Than  
8
82S105A  
9
Q7  
Q6  
Q5  
Q4  
GND  
10  
11  
12  
13  
14  
description  
The TIB82S105BC is a TTL field-programmable  
state machine of the Mealy type. This state  
machine (logic sequencer) contains 48 product  
terms (AND terms) and 14 pairs of sum terms (OR  
terms). The product and sum terms are used to  
control the 6-bit internal state register and the 8-bit  
output register.  
FN PACKAGE  
(TOP VIEW)  
The outputs of the internal state register (P0P5)  
are fed back and combined with the 16 inputs  
(I0I15) to form the AND array. In addition a single  
sum term is complemented and fed back to the  
AND array, which allows any of the product ter
to be summed, complemented, and used as an  
input to the AND array.  
4
5
3 2 1 28 27 26  
I4  
I3  
I2  
I1  
I0  
I10  
I11  
I12  
25  
24  
23  
6
7
8
22 I13  
21 I14  
20 I15  
19 PRE/OE  
9
10  
11  
Q7  
Q6  
The state and output registers are positivge-  
triggered S/R flip-flops. These registers are  
unconditionally preset high during power up.  
Pin19 can be used to preset both registers or, by  
blowing the proper fuse, be converted to an output  
control function.  
12 13 14 15 16 17 18  
The TIB82S105BC is characterized for operation  
from 0°C to 75°C.  
† Power-up preset and asynchronous preset functions are not identical to 82S105A. See Recommended Operating Conditions.  
PRODUCTION DATA information is current as of publication date.  
Copyright 1995, Texas Instruments Incorporated  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
1

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