THS10064
10-BIT 6 MSPS, SIMULTANEOUS SAMPLING
ANALOG-TO-DIGITAL CONVERTER
SLAS255 – DECEMBER 1999
features
applications
Simultaneous Sampling of 4 Single-Ended
Radar Applications
Signals or 2 Differential Signals or
Combination of Both
Communications
Control Applications
High-Speed DSP Front-End
Automotive Applications
Integrated 16-Word FIFO
Signal-to-Noise and Distortion Ratio: 59 dB
at f = 2 MHz
I
Differential Nonlinearity Error: ±1 LSB
Integral Nonlinearity Error: ±1 LSB
Auto-Scan Mode for 2, 3, or 4 Inputs
3-V or 5-V Digital Interface Compatible
Low Power: 216 mW Max
DA (TSSOP) PACKAGE
(TOP VIEW)
D0
D1
D2
D3
D4
D5
AINP
1
32
31
30
29
28
27
26
25
24
23
22
AINM
2
BINP
3
BINM
5-V Analog Single Supply Operation
4
REFIN
REFOUT
REFP
REFM
AGND
5
Internal Voltage References . . . 50 PPM/°C
and ±5% Accuracy
6
BV
7
DD
BGND
Parallel µC/DSP Interface
8
D6
9
description
D7
AV
10
11
12
13
14
15
16
DD
The THS10064 is a CMOS, low-power, 10-bit,
6 MSPS analog-to-digital converter (ADC). The
speed, resolution, bandwidth, and single-supply
operation are suited for applications in radar,
D8
CS0
D9
21 CS1
RA0
RA1
20 WR (R/W)
19 RD
imaging,
high-speed
acquisition,
and
18
17
CONV_CLK (CONVST)
DATA_AV
DV
DD
DGND
communications.
A
multistage pipelined
architecture with output error correction logic
provides for no missing codes over the full
operating temperature range. Internal control
registers are used to program the ADC into the desired mode. The THS10064 consists of four analog inputs,
which are sampled simultaneously. These inputs can be selected individually and configured to single-ended
or differential inputs. An integrated 16 word deep FIFO allows the storage of data in order to improve data
transfers to the processor. Internal reference voltages for the ADC (1.5 V and 3.5 V) are provided.
An external reference can also be chosen to suit the dc accuracy and temperature drift requirements of the
application. Two different conversion modes can be selected. In single conversion mode, a single and
simultaneous conversion of up to four inputs can be initiated by using the single conversion start signal
(CONVST). The conversion clock in single conversion mode is generated internally using a clock oscillator
circuit. In continuous conversion mode, an external clock signal is applied to the CONV_CLK input of the
THS10064. The internal clock oscillator is switched off in continuous conversion mode.
The THS10064C is characterized for operation from 0°C to 70°C, and the THS10064I is characterized for
operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265