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THS10082IDARG4 PDF预览

THS10082IDARG4

更新时间： 2024-09-29 20:53:19
品牌 Logo 应用领域
德州仪器 - TI 光电二极管
页数 文件大小 规格书
35页 219K
描述
IC,DATA ACQ SYSTEM,2-CHANNEL,10-BIT,TSSOP,32PIN,PLASTIC

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THS10082IDARG4 技术参数

是否Rohs认证： 符合生命周期：Obsolete
包装说明：TSSOP, TSSOP32,.3Reach Compliance Code：unknown
风险等级：5.84JESD-30 代码：R-PDSO-G32
最大线性误差 (EL)：0.098%模拟输入通道数量：2
位数：10端子数量：32
最高工作温度：85 °C最低工作温度：-40 °C
输出位码：BINARY, 2'S COMPLEMENT BINARY封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP32,.3
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源：3.3,5 V认证状态：Not Qualified
子类别：Analog to Digital Converters表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.635 mm
端子位置：DUALBase Number Matches：1

THS10082IDARG4 数据手册

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www.ti.com  
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SLAS254B – MAY 2002 – REVISED NOVEMBER 2002  
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of the processor connected to the ADC. Internal  
reference voltages for the ADC (1.5 V and 3.5 V) are  
provided.  
FEATURES  
D
Simultaneous Sampling of Two Single-Ended  
Signals or One Differential Signal  
An external reference can also be chosen to suit the dc  
accuracy and temperature drift requirements of the  
application. Two different conversion modes can be  
selected. In the single conversion mode, a single and  
simultaneous conversion can be initiated by using the  
single conversion start signal (CONVST). The conversion  
clock in the single conversion mode is generated internally  
using a clock oscillator circuit. In the continuous  
conversion mode, an external clock signal is applied to the  
CONV_CLK input of the THS10082. The internal clock  
oscillator is switched off in the continuous conversion  
mode.  
D
Integrated 16-Word FIFO  
D
Signal-to-Noise and Distortion Ratio: 59 dB at  
f = 2 MHz  
I
D
D
D
D
D
D
D
Differential Nonlinearity Error: ±1 LSB  
Integral Nonlinearity Error: ±1 LSB  
Auto-Scan Mode for Two Inputs  
3-V or 5-V Digital Interface Compatible  
Low Power: 216 mW Max  
5-V Analog Single Supply Operation  
Internal Voltage References . . . 50 PPM/°C  
and ±5% Accuracy  
The THS10082C is characterized for operation from 0°C  
to 70°C, and the THS10082I is characterized for operation  
from –40°C to 85°C.  
D
Parallel µC/DSP Interface  
APPLICATIONS  
DA PACKAGE  
(TOP VIEW)  
D
D
D
D
D
Radar Applications  
Communications  
D0  
D1  
D2  
D3  
D4  
D5  
OV_FL  
RESET  
AINP  
1
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
Control Applications  
High-Speed DSP Front-End  
Automotive Applications  
2
3
AINM  
4
REFIN  
REFOUT  
REFP  
REFM  
AGND  
5
DESCRIPTION  
6
BV  
7
DD  
The THS10082 is a CMOS, low-power, 10-bit, 8 MSPS  
analog-to-digital converter (ADC). The speed, resolution,  
bandwidth, and single-supply operation are suited for  
applications in radar, imaging, high-speed acquisition, and  
communications. A multistage pipelined architecture with  
output error correction logic provides for no missing codes  
over the full operating temperature range. Internal control  
registers allow for programming the ADC into the desired  
mode. The THS10082 consists of two analog inputs,  
which are sampled simultaneously. These inputs can be  
selected individually and configured to single-ended or  
differential inputs. An integrated 16 word deep FIFO  
allows the storage of data in order to take the load off  
BGND  
8
D6  
D7  
9
AV  
10  
11  
12  
13  
14  
15  
16  
DD  
D8  
D9  
CS0  
CS1  
RA0  
RA1  
20 WR (R/W)  
19  
18  
17  
RD  
DV  
CONV_CLK (CONVST)  
DATA_AV  
DD  
DGND  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments  
semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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ꢑꢝ ꢜ ꢨꢣꢢ ꢠ ꢙꢜ ꢚ ꢥꢝ ꢜ ꢢ ꢤ ꢡ ꢡ ꢙꢚ ꢮ ꢨꢜ ꢤ ꢡ ꢚꢜꢠ ꢚꢤ ꢢꢤ ꢡꢡ ꢟꢝ ꢙꢧ ꢭ ꢙꢚꢢ ꢧꢣꢨ ꢤ ꢠꢤ ꢡꢠꢙ ꢚꢮ ꢜꢛ ꢟꢧ ꢧ ꢥꢟ ꢝ ꢟꢞ ꢤꢠꢤ ꢝ ꢡꢩ  
Copyright 2002, Texas Instruments Incorporated  
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