THS10064

更新时间： 2024-01-27 20:20:47

品牌	Logo	应用领域
德州仪器 - TI		转换器
页数	文件大小	规格书
41页	543K
描述
10-BIT 6 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTER

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技术参数
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THS10064 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	TSSOP	包装说明：	TSSOP, TSSOP32,.3
针数：	32	Reach Compliance Code：	not_compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.32	最大模拟输入电压：	4.05 V
最小模拟输入电压：	1.4 V	转换器类型：	ADC, PROPRIETARY METHOD
JESD-30 代码：	R-PDSO-G32	JESD-609代码：	e4
长度：	11 mm	最大线性误差 (EL)：	0.0977%
湿度敏感等级：	1	模拟输入通道数量：	4
位数：	10	功能数量：	1
端子数量：	32	最高工作温度：	85 °C
最低工作温度：	-40 °C	输出位码：	BINARY, 2'S COMPLEMENT BINARY
输出格式：	PARALLEL, WORD	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装等效代码：	TSSOP32,.3
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：	220	电源：	3/5,5 V
认证状态：	Not Qualified	采样速率：	6 MHz
采样并保持/跟踪并保持：	SAMPLE	座面最大高度：	1.2 mm
子类别：	Analog to Digital Converters	标称供电电压：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	6.1 mm

THS10064 数据手册

THS10064

10-BIT 6 MSPS, SIMULTANEOUS SAMPLING

ANALOG-TO-DIGITAL CONVERTER

SLAS255 – DECEMBER 1999

features

applications

Simultaneous Sampling of 4 Single-Ended

Radar Applications

Signals or 2 Differential Signals or

Combination of Both

Communications

Control Applications

High-Speed DSP Front-End

Automotive Applications

Integrated 16-Word FIFO

Signal-to-Noise and Distortion Ratio: 59 dB

at f = 2 MHz

Differential Nonlinearity Error: ±1 LSB

Integral Nonlinearity Error: ±1 LSB

Auto-Scan Mode for 2, 3, or 4 Inputs

3-V or 5-V Digital Interface Compatible

Low Power: 216 mW Max

DA (TSSOP) PACKAGE

(TOP VIEW)

AINP

AINM

BINP

BINM

5-V Analog Single Supply Operation

REFIN

REFOUT

REFP

REFM

AGND

Internal Voltage References . . . 50 PPM/°C

and ±5% Accuracy

BGND

Parallel µC/DSP Interface

description

The THS10064 is a CMOS, low-power, 10-bit,

6 MSPS analog-to-digital converter (ADC). The

speed, resolution, bandwidth, and single-supply

operation are suited for applications in radar,

CS0

21 CS1

RA0

RA1

20 WR (R/W)

19 RD

imaging,

high-speed

acquisition,

and

CONV_CLK (CONVST)

DATA_AV

DGND

communications.

multistage pipelined

architecture with output error correction logic

provides for no missing codes over the full

operating temperature range. Internal control

registers are used to program the ADC into the desired mode. The THS10064 consists of four analog inputs,

which are sampled simultaneously. These inputs can be selected individually and configured to single-ended

or differential inputs. An integrated 16 word deep FIFO allows the storage of data in order to improve data

transfers to the processor. Internal reference voltages for the ADC (1.5 V and 3.5 V) are provided.

An external reference can also be chosen to suit the dc accuracy and temperature drift requirements of the

application. Two different conversion modes can be selected. In single conversion mode, a single and

simultaneous conversion of up to four inputs can be initiated by using the single conversion start signal

(CONVST). The conversion clock in single conversion mode is generated internally using a clock oscillator

circuit. In continuous conversion mode, an external clock signal is applied to the CONV_CLK input of the

THS10064. The internal clock oscillator is switched off in continuous conversion mode.

The THS10064C is characterized for operation from 0°C to 70°C, and the THS10064I is characterized for

operation from –40°C to 85°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...41

中文翻译

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与THS10064相关器件

型号	品牌	获取价格	描述	数据表
THS10064CDA	TI	获取价格	10-BIT 6 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTER
THS10064CDAR	TI	获取价格	10-Bit, 6 MSPS ADC Quad Ch. (Config.), DSP/uP Interface, Integ. 16x FIFO, Ch. AutoScan, Lo
THS10064CDARG4	TI	获取价格	4-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32, GREEN, PLASTIC, TSSOP-32
THS10064DA	TI	获取价格	10-BIT 6 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTER
THS10064IDA	TI	获取价格	10-BIT 6 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTER
THS10064IDARG4	ROCHESTER	获取价格	ADC, Proprietary Method
THS10064IDARG4	TI	获取价格	IC,A/D CONVERTER,SINGLE,10-BIT,CMOS,TSSOP,32PIN
THS1007	TI	获取价格	10-BIT, 4 ANALOG INPUT, 6-MSPS, SIMULATANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTER
THS1007_14	TI	获取价格	10-BIT, 4 ANALOG INPUT, 6-MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTER
THS1007CDA	TI	获取价格	10-BIT, 4 ANALOG INPUT, 6-MSPS, SIMULATANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTER

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