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THD4031035DJ005000-16.384M PDF预览

THD4031035DJ005000-16.384M

更新时间: 2024-11-18 19:36:23
品牌 Logo 应用领域
PLETRONICS 机械PCS过程控制系统石英晶振温度补偿晶振振荡器
页数 文件大小 规格书
6页 610K
描述
TCXO, Clock,

THD4031035DJ005000-16.384M 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:LCC4,.12X.2,145/86Reach Compliance Code:compliant
风险等级:5.6其他特性:LESS THAN 250 PCS AVAILABLE IN TAPE PACKING
老化:1 PPM/YEAR最长下降时间:6.5 ns
频率调整-机械:NO频率稳定性:0.5%
安装特点:SURFACE MOUNT端子数量:4
标称工作频率:16.384 MHz最高工作温度:80 °C
最低工作温度:-5 °C振荡器类型:CMOS
输出负载:15 pF封装主体材料:CERAMIC
封装等效代码:LCC4,.12X.2,145/86物理尺寸:5.0mm x 3.2mm x 1.5mm
最长上升时间:6.5 ns最大供电电压:3.5 V
最小供电电压:3.1 V标称供电电压:3.3 V
表面贴装:YES最大对称度:60/40 %
Base Number Matches:1

THD4031035DJ005000-16.384M 数据手册

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THD4 Series  
PLETRONICS THD4 Series  
TCXO / TCVCXO  
TCXO / TCVCXO  
Applications  
Features  
SONET / SDH / DWDM  
Pletronics’ THD4 Series Temperature Compensated  
Test & Measurement  
Crystal Oscillator  
Telecom Transmission & Switching Equipment  
Base Stations / Picocell  
Wireless Communication Equipment  
Optional Voltage Control Function  
Low Power / Fast Warm Up  
CMOS Output  
THD4  
3.2 x 5.0 x 1.50 mm  
LCC Ceramic Package  
2.8V to 3.3V nominal Supply Voltage  
See table for developed Frequencies  
Electrical Characteristics  
Condition (Consult factory for other options)  
Parameter  
Frequency Range 2  
Min  
Typ  
-
Max  
Unit  
8.192  
40.0  
MHz  
See table below for developed frequencies  
Frequency Stability vs. Temperature 2  
-
-
±0.5  
-
ppm  
ppm  
(fmax - fmin) / 2  
Vcontrol 1.50 volts nominal if used when VCC > 3.0 volts  
Referenced to the value 25°C ± 2°C  
Frequency Initial Calibration  
-
± 2.0  
Operating Temperature Range 2  
Supply Voltage 1, 2 VCC  
-40  
-
-
+85  
3.3  
°C  
Widest range available  
2.8  
Volts  
± 5%  
4.0  
5.0  
7.0  
13 MHz  
26 MHz  
40 MHz  
Supply Current ICC  
-
-
mA  
Load: 15 pF, VCC ± 5%  
Frequency Stability vs. Supply  
Frequency Stability vs. Load  
Vcontrol Range  
-
-
-
± 0.2  
± 0.2  
2.5  
ppm  
ppm  
Volts  
ppm  
Load: 15 pF, VCC ± 5%  
Load: 15 pF, VCC ± 5%  
1.50 volts nominal for VCC  
Positive Slope  
-
-
0.5  
0
Frequency Pullability 2  
Output Waveform  
Duty Cycle  
±8.0  
±12.0  
CMOS  
40  
90  
50  
60  
%
Load: 15 pF  
Output VHIGH  
-
-
%Vdd  
Vth: TR and TF 10% and 90% of amplitude  
Vth: D.C. 50% of amplitude  
Output VLOW  
-
-
-
-
-
-
-
-
10  
%Vdd  
nS  
Output TRISE and TFALL  
Startup Time  
6.5  
10.0  
±1.0  
mS  
Within ± 2.0 ppm of final frequency  
Per year at 25°C ± 2°C  
Long Term Stability (Aging)  
ppm  
Phase Noise  
100 Hz  
1 kHz  
10 kHz  
100 kHz  
-120  
-134  
-144  
-145  
-
-
dBc/Hz  
°C  
25°C ± 2°C at 26.0 MHz  
Storage Temperature Range  
-55  
-
+95  
Note:  
1 Place a 10nF power supply bypass capacitor next to device for correct operation  
2 Specified by part number.  
The following is a list of developed frequencies. Consult factory for other options.  
8.192M, 9.60M, 9.72M, 10.00M, 12.80M, 13.00M, 16.384M,  
19.20M, 19.44M, 20.00M, 25.60M, 26.00M, 40.00M only  
Product information is current as of publication date. The product conforms to specifications per the terms of the Pletronics standard warranty.  
Production processing does not necessarily include testing of all parameters.  
June 5, 2015 Rev. B  
Pg 1  
Copyright © 2015, Pletronics Inc. C19013 36th Ave. W, Lynnwood, WA 98036 USA C www.pletronics.com C 425-776-1880  

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