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TFG-756DVX7 PDF预览

TFG-756DVX7

更新时间: 2024-11-20 21:53:35
品牌 Logo 应用领域
其他 - ETC 振荡器晶体时钟
页数 文件大小 规格书
1页 51K
描述
Crystal Clock Oscillator

TFG-756DVX7 数据手册

  
Crystal Clock Oscillator  
TFG-756DVX7  
FULL DIP Double-Sealed VCXO  
Absolute Maximum Ratings  
Features  
CMOS logic output  
DIP-14 pin package compatible  
Hermetically double-sealed metal package  
Voltage controlled oscillator  
Parameter  
Supply voltage  
Input voltage  
Symbol  
Rating  
Vcc  
-0.5 to +7.0 V  
-0.5 to Vcc+0.5 V  
-0.5 to Vcc+0.5 V  
20 mA  
VIN  
Output voltage  
Output current  
Storage temperature  
VO  
IO  
Tstg  
-40 to +85 °C  
Specifications  
Conditions  
Parameter  
TFG-756DVX7  
40 to 100 MHz  
fo  
Frequency  
50 ppm max.  
(*1)  
Δf/fo  
Frequency Stability  
Pullability  
150 ppm min.  
at Vcont=0 to +5.0V, Ref=+2.5 V  
DC, Pin #1  
+2.5 V 2.5V  
Vcont  
Topr  
Vcc  
Control Voltage Range  
Operating Temperature  
Supply Voltage  
0 °C to +70 °C  
+5.0 V 5%  
DC, Pin #14  
Vcc=+5.25V  
See Table A (max.)  
OH=Vcc-0.5 V min. / VOL=+0.5 V max.  
Icc  
Supply Current  
V
V
I
I
=-4mA Pin #8  
OH  
OL  
OH  
V
Output Voltage  
=+4mA  
OL  
SYM  
40 to 60 %  
Symmetry  
at 50% Vcc  
at 20% to 80% Vcc  
See Table A (max.)  
tr/tf  
CL  
tst  
Rise/Fall time  
Load Capacitance  
Start-up time  
30 pF max.  
4 ms max.  
*1 Inclusive of calibration tolerance at +25°C, operating temperature, operating voltage range.  
*2 Rise time (0 to +4.75V) of Vcc >150μs  
Package Outlines [Dimensions in mm]  
Table A  
Freq.  
(MHz)  
40 fo 60 < fo  
fo 60 fo 100  
20.8 max.  
Model  
Icc  
50  
4
60  
3
(mA)  
TOYOCOM  
Marking  
tr,tf  
(ns)  
MHz  
JAPAN  
Frequency  
Date Code  
Test Circuit  
See Test Circuit page TEST-7  
Denotes Pin #1 Location  
Solder dip  
0.79  
ø0.46  
12.19  
#1  
#7  
Pin  
#1  
CONNECTION  
CONTROL VOLTAGE  
GND/case  
#7  
#8  
Output  
#14  
#8  
15.24  
#14  
Vcc DC  

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