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TDA8740H-T PDF预览

TDA8740H-T

更新时间: 2024-02-19 13:22:58
品牌 Logo 应用领域
恩智浦 - NXP 消费电路商用集成电路接收器集成电路光电二极管
页数 文件大小 规格书
24页 326K
描述
IC FM, AUDIO DEMODULATOR, PQFP44, Receiver IC

TDA8740H-T 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:SDIP, SDIP42,.6Reach Compliance Code:unknown
风险等级:5.92JESD-30 代码:R-PDIP-T42
JESD-609代码:e0端子数量:42
最高工作温度:70 °C最低工作温度:-20 °C
封装主体材料:PLASTIC/EPOXY封装代码:SDIP
封装等效代码:SDIP42,.6封装形状:RECTANGULAR
封装形式:IN-LINE, SHRINK PITCH电源:12 V
认证状态:Not Qualified子类别:Other Consumer ICs
最大压摆率:45 mA表面贴装:NO
技术:BIPOLAR温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:1.78 mm端子位置:DUAL
Base Number Matches:1

TDA8740H-T 数据手册

 浏览型号TDA8740H-T的Datasheet PDF文件第5页浏览型号TDA8740H-T的Datasheet PDF文件第6页浏览型号TDA8740H-T的Datasheet PDF文件第7页浏览型号TDA8740H-T的Datasheet PDF文件第9页浏览型号TDA8740H-T的Datasheet PDF文件第10页浏览型号TDA8740H-T的Datasheet PDF文件第11页 
Philips Semiconductors  
Product specification  
Satellite sound circuit with noise reduction  
TDA8740; TDA8740H  
NOISE REDUCTION (NR)  
ABBREVIATIONS  
fMOD = modulating frequency.  
The noise reduction can be regarded as an input  
level-dependent low-pass filter (adaptive de-emphasis  
system) followed by a fixed de-emphasis. With maximum  
input level (0 dB) the frequency response of the first part  
(i.e. without the fixed de-emphasis) is virtually flat. As the  
input level is lowered by x-dB, the higher output  
frequencies will be reduced an extra x-dB with respect to  
the lower frequencies (1 : 2 expansion).  
fM = frequency deviation of the main Channel.  
fS1 = frequency deviation of secondary Channel 1 (left).  
fS2 = frequency deviation of secondary Channel 2 (right).  
fOM = carrier frequency of main Channel.  
fOS1 = carrier frequency of secondary Channel 1.  
fOS2 = carrier frequency of secondary Channel 2.  
LPF = Low-Pass Filter.  
The NR output signal is fed to pin 36 (32) (left) and pin 32  
(28) (right) via internal resistors.  
Fixed de-emphasis is achieved by these resistors and  
external capacitors connected to ground. The signals are  
DC decoupled via pins 36/35 (32/31) and 32/33 (28/29)  
and then routed to the output selectors.  
NR = Noise Reduction.  
PLL = Phase-Locked-Loop  
OUTPUT SELECTION  
With the output selector (see Table 2) the outputs at  
pins 25 and 24 (21 and 20) can be switched to the different  
channels. Both outputs can be switched to both secondary  
channels, to the main channel and to the external inputs at  
pin 28 and 27 (24 and 23) for IC chaining purposes.  
Pin 23 (19) is a separate output which delivers the main  
channel only, thereby creating the possibility of having  
three different output channels simultaneously e.g. for use  
in hi-fi VCRs.  
The outputs at pins 25 and 24 (21 and 20) can be muted  
by setting the MUTE signal at pin 13 (8) to logic 1 (switch  
positions 6 and 7).  
The output at pin 23 (19) can be muted by setting the  
MUTE signal and the EXT/INT signal at pin 26 (22) both  
logic 1 (switch position 7).  
All outputs at pins 23, 24 and 25 (19, 20 and 21) are line  
drivers with SCART level capability and are short-circuit  
protected by 125 output resistors.  
Output level of all channels = 6 dBV typical when  
frequency deviation of FM signal is 54% of maximum  
frequency deviation (i.e. 0.54 × 85 kHz = 46 kHz for the  
main channel and 0.54 × 50 kHz = 27 kHz for the  
secondary channels) at 1 kHz modulation frequency  
(reference level).  
October 1994  
8

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