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TDA8035HN/C2/S1QL PDF预览

TDA8035HN/C2/S1QL

更新时间: 2024-02-11 21:56:04
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
32页 850K
描述
TDA8035HN - High integrated and low power smart card interface QFN 32-Pin

TDA8035HN/C2/S1QL 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:QFN针数:32
Reach Compliance Code:compliant风险等级:5.56
Base Number Matches:1

TDA8035HN/C2/S1QL 数据手册

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TDA8035  
High integrated and low power smart card interface  
Rev. 3.1 — 30 June 2016  
Product data sheet  
1. General description  
The TDA8035 is the cost efficient successor of the established integrated contact smart  
card reader IC TDA8024. It offers a high level of security for the card by performing  
current limitation, short-circuit detection, ESD protection as well as supply supervision.  
The current consumption during the standby mode of the contact reader is very low as it  
operates in the 3 V supply domain. The TDA8035 is therefore the ideal component for a  
power efficient contact reader.  
2. Features and benefits  
2.1 Protection of the contact smart card  
Thermal and short-circuit protection on all card contacts  
VCC regulation:  
5 V, 3 V, 1.8 V 5 % on 2 220 nF multilayer ceramic capacitors with low ESR  
Current spikes of 40 nA/s (VCC = 5 V and 3 V) or 15 nA/s (VCC = 1.8 V) up to  
20 MHz, with controlled rise and fall times. Filtered overload detection is  
approximately 120 mA.  
Automatic activation and deactivation sequences initiated by software or by hardware  
in the event of a short-circuit, card take-off, overheating, falling VREG VDD(INTF),VDDP  
Enhanced card-side ElectroStatic Discharge (ESD) protection of (> 8 kV)  
Supply supervisor for killing spikes during power on and off:  
threshold internally fixed  
externally by a resistor bridge  
2.2 Easy integration into your contact reader  
SW compatible to TDA8024 and TDA8034  
5 V, 3 V, 1.8 V smart card supply  
DC-to-DC converter for VCC generation separately powered from 2.7 V to 5.5 V supply  
(VDDP and GNDP)  
Very low power consumption in Deep Shutdown mode  
Three protected half-duplex bidirectional buffered I/O lines (C4, C7 and C8)  
External clock input up to 26 MHz  
Card clock generation up to 20 MHz using pins CLKDIV1 and CLKDIV2 with  
synchronous frequency changes of fXTAL, fXTAL/2, fXTAL/4 or fXTAL/8  
Non-inverted control of pin RST using pin RSTIN  
Built-in debouncing on card presence contact  
Multiplexed status signal using pin OFFN  
 
 
 
 

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