Datasheet > TC7QPB9307FT

TC7QPB9307FT

更新时间： 2024-11-22 14:55:11

品牌	Logo	应用领域
东芝 - TOSHIBA		/
页数	文件大小	规格书
17页	370K
描述
4-Bit Dual Supply Bus Switch, SPST, TSSOP14

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技术参数
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TC7QPB9307FT 技术参数

是否Rohs认证：	符合	生命周期：	Active
零件包装代码：	TSSOP	包装说明：	TSSOP,
针数：	14	Reach Compliance Code：	unknown
HTS代码：	8542.39.00.01	风险等级：	5.82
其他特性：	ALSO OPERATES WITH 2.3-5.5 V SUPPLY	系列：	9307
JESD-30 代码：	R-PDSO-G14	长度：	5 mm
逻辑集成电路类型：	BUS DRIVER	位数：	1
功能数量：	1	端口数量：	2
端子数量：	14	最高工作温度：	85 °C
最低工作温度：	-40 °C	输出特性：	3-STATE
输出极性：	TRUE	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	峰值回流温度（摄氏度）：	NOT SPECIFIED
传播延迟（tpd）：	0.45 ns	认证状态：	Not Qualified
座面最大高度：	1.2 mm	最大供电电压 (Vsup)：	5 V
最小供电电压 (Vsup)：	1.65 V	标称供电电压 (Vsup)：	2.5 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	4.4 mm

TC7QPB9307FT 数据手册

TC7QPB9306FT,TC7QPB9307FT

CMOS Digital Integrated Circuits Silicon Monolithic

TC7QPB9306FT,TC7QPB9307FT

1. Functional Description

•

Low-Voltage, Low-Power 4-Bit Dual-Supply Bus Switch

2. General

The TC7QPB9306FT and TC7QPB9307FT are CMOS 4-bit dual-supply bus switches that can provide an interface

between two nodes at different voltage levels. These devices can be connected to two independent power supplies.

VCCA supports 1.8 V, 2.5 V and 3.3 V power supplies, whereas VCCB supports 2.5 V, 3.3 V and 5.0 V power supplies.

Bidirectional level-shifting is possible by simply adding external pull-up resistors between the An/Bn data lines

and the VCCA / VCCB supplies. There is no restriction on the relative magnitude of the An and Bn voltages; both

the An and Bn data lines can be pulled up to arbitrary power supplies.

The enable signal can be used to disable the device so that the buses are effectively isolated.

The Output Enable (OE:TC7QPB9306FT, OE:TC7QPB9307FT) input is common for all the 4-bits of the data

lines; thus these device are used as a single 4-bits bus switch. For the TC7QPB9306FT, Output Enable (OE) is

active-High: When OE is High, the switch is on; when Low, the switch is off. For the TC7QPB9307FT, Output

Enable (OE) is active-Low: When OE is Low, the switch is on; when High, the switch is off.

The TC7QPB9306FT and TC7QPB9307FT supports power-down protection at the OE, OE input, with OE, OE

being 5.5 V tolerant.

The channels consist of n-type MOSFETs.

All the inputs provide protection against electrostatic discharge.

3. Features

(1) AEC-Q100 (rev.H) Grade 1 qualified (Note 1)

(2) Wide operating temperature range: Topr = -40 to 125 � (Note 2)

(3) Operating voltage: 1.8 V to 2.5 V / 1.8 V to 3.3 V / 1.8 V to 5.0 V / 2.5 V to 3.3 V / 2.5 V to 5.0 V /

3.3 V to 5.0 V bidirectional interface

(4) Operating voltage: VCCA = 1.65 to 5.0 V, VCCB = 2.3 to 5.5 V

(5) Low ON-resistance: RON = 8.0 Ω (Max) @ VIS = 0 V, IIS = 30 mA, VCCA = 3.0 V, VCCB = 4.5 V

(6) 5.5 V tolerance and power-down protection at the Output Enable input.

(7) Packages: TSSOP14, TSSOP14B

Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales

representative.

Note 2: Operating Range spec of Topr = -40 � to 125 � is applicable only for the products which manufactured after

April 2020.

Start of commercial production

2009-09

Toshiba Electronic Devices & Storage Corporation

2022-09-07

Rev.7.0

12 3 4 5 6 7...17

中文翻译

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与TC7QPB9307FT相关器件

型号	品牌	获取价格	描述	数据表
TC7QPB9307FTG	TOSHIBA	获取价格	IC 9307 SERIES, 1-BIT DRIVER, TRUE OUTPUT, PQCC16, 3 X 3 MM, 0.50 MM PITCH, PLASTIC, VQON-
TC7S00F	TOSHIBA	获取价格	2-INPUT NAND GATE
TC7S00F(T5LMBS,F)	TOSHIBA	获取价格	NAND Gate
TC7S00F(TE12L)	TOSHIBA	获取价格	IC HC/UH SERIES, 2-INPUT NAND GATE, PDSO5, PLASTIC, SSOP-5, Gate
TC7S00F(TE12L)F	TOSHIBA	获取价格	NAND Gate
TC7S00F(TE85L,F)	TOSHIBA	获取价格	IC HC/UH SERIES, 2-INPUT NAND GATE, PDSO5, 0.95 MM PITCH, PLASTIC, SSOP-5, Gate
TC7S00F(TE85R)	TOSHIBA	获取价格	NAND Gate
TC7S00F,LF(T	TOSHIBA	获取价格	暂无描述
TC7S00F_09	TOSHIBA	获取价格	TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC7S00FTE85L	TOSHIBA	获取价格	NAND Gate 1-Element 2-IN CMOS 5-Pin SSOP T/R

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