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TC74VHCT00AFN(F,M) PDF预览

TC74VHCT00AFN(F,M)

更新时间: 2024-02-19 20:31:18
品牌 Logo 应用领域
东芝 - TOSHIBA
页数 文件大小 规格书
9页 244K
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TC74VHCT00AFN(F,M) 数据手册

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TC74VHCT00AF/AFN/AFT/AFK  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74VHCT00AF,TC74VHCT00AFN,TC74VHCT00AFT,TC74VHCT00AFK  
Quad 2-Input NAND Gate  
Note: xxxFN (JEDEC SOP) is not available in  
Japan.  
The TC74VHCT00A is an advanced high speed CMOS  
2-INPUT NAND GATE fabricated with silicon gate C2MOS  
TC74VHCT00AF  
technology.  
It achieves the high speed operation similar to equivalent  
Bipolar Schottky TTL while maintaining the CMOS low power  
dissipation.  
The input voltage are compatible with TTL output voltage.  
This device may be used as a level converter for interfacing 3.3  
V to 5 V system.  
Input protection and output circuit ensure that 0 to 5.5 V can  
be applied to the input and output (Note) pins without regard to  
the supply voltage. These structure prevents device destruction  
TC74VHCT00AFN  
due to mismatched supply and input/output voltages such as  
battery back up, hot board insertion, etc.  
Note:  
V
CC  
= 0 V  
Features  
High speed: t = 5.0 ns (typ.) at V  
= 5 V  
pd  
CC  
Low power dissipation: I  
= 2 μA (max) at Ta = 25°C  
CC  
TC74VHCT00AFT  
Compatible with TTL outputs: V = 0.8 V (max)  
IL  
V
IH  
= 2.0 V (min)  
Power down protection is provided on all inputs and outputs.  
Balanced propagation delays: t  
t
pHL  
pLH  
Low noise: V  
= 0.8 V (max)  
OLP  
Pin and function compatible with the 74 series  
(74AC/HC/F/ALS/LS etc.) 00 type.  
TC74VHCT00AFK  
Weight  
SOP14-P-300-1.27A  
SOL14-P-150-1.27  
: 0.18 g (typ.)  
: 0.12 g (typ.)  
TSSOP14-P-0044-0.65A : 0.06 g (typ.)  
VSSOP14-P-0030-0.50  
: 0.02 g (typ.)  
1
2007-10-17  

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