Datasheet > TC74VHCT00AFN(M)

TC74VHCT00AFN(M)

更新时间： 2024-02-05 01:51:52

品牌	Logo	应用领域
东芝 - TOSHIBA		/
页数	文件大小	规格书
6页	207K
描述
TC74VHCT00AFN(M)

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TC74VHCT00AFN(M) 数据手册

TC74VHCT00AFN

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74VHCT00AFN

Quad 2-Input NAND Gate

Note: xxxFN (JEDEC SOP) is not available in

Japan.

The TC74VHCT00A is an advanced high speed CMOS 2-INPUT

NAND GATE fabricated with silicon gate C²MOS technology.

It achieves the high speed operation similar to equivalent

Bipolar Schottky TTL while maintaining the CMOS low power

dissipation.

TC74VHCT00AFN

The input voltage are compatible with TTL output voltage.

This device may be used as a level converter for interfacing 3.3

V to 5 V system.

Input protection and output circuit ensure that 0 to 5.5 V can be

applied to the input and output ^(Note)pins without regard to the

supply voltage. These structure prevents device destruction due to

mismatched supply and input/output voltages such as battery

back up, hot board insertion, etc.

Weight

SOL14-P-150-1.27:

0.12 g (typ.)

Note:

= 0 V

Features

•

High speed: t = 5.0 ns (typ.) at V

= 5 V

Low power dissipation: I

= 2 μA (max) at Ta = 25°C

Compatible with TTL inputs:

= 0.8 V (max)

= 2.0 V (min)

•

Power down protection is provided on all inputs and outputs.

Balanced propagation delays: t ≈ t

pLH

pHL

Low noise: V

= 0.8 V (max)

OLP

Pin and function compatible with the 74 series (74AC/HC/F/ALS/LS etc.) 00 type.

2012-02-29

12 3 4 5 6

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