TC74VHC139FN(F)

更新时间： 2024-11-16 13:14:31

品牌	Logo	应用领域
东芝 - TOSHIBA		解码器驱动器逻辑集成电路光电二极管
页数	文件大小	规格书
8页	228K
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中文翻译

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数据手册

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TC74VHC139FN(F) 数据手册

TC74VHC139F/FN/FT

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74VHC139F,TC74VHC139FN,TC74VHC139FT

Dual 2-to-4 Line Decoder

Note: xxxFN (JEDEC SOP) is not available in

Japan.

The TC74VHC139 is an advanced high speed CMOS 2 to 4

LINE DECODER/DEMULTIPLEXER fabricated with silicon

gate C2MOS technology.

It achieves the high speed operation similar to equivalent

Bipolar Schottky TTL while maintaining the CMOS low power

dissipation.

The active low enable input can be used for gating or it can be

used as a data input for demultiplexing applications.

When the enable input is held High, all four outputs are fixed

at a high logic level independent of the other inputs.

An input protection circuit ensures that 0 to 5.5 V can be

applied to the input pins without regard to the supply voltage.

This device can be used to interface 5 V to 3 V systems and two

supply systems such as battery back up. This circuit prevents

device destruction due to mismatched supply and input voltages.

TC74VHC139F

TC74VHC139FN

TC74VHC139FT

Features

•

High speed: t = 5.0 ns (typ.) at V

= 5 V

Low power dissipation: I

= 4 μA (max) at Ta = 25°C

High noise immunity: V

= V

= 28% V

NIH

NIL CC (min)

Power down protection is provided on all inputs.

∼

−

Balanced propagation delays: t

pHL

pLH

Wide operating voltage range: V

= 2 V to 5.5 V

CC (opr)

Pin and function compatible with 74ALS139

Pin Assignment

Weight

16 VCC

15 2G

14 2A

SOP16-P-300-1.27A

SOL16-P-150-1.27

TSSOP16-P-0044-0.65A

: 0.18 g (typ.)

: 0.13 g (typ.)

: 0.06 g (typ.)

1Y0

13 2B

1Y1

1Y2

12 2Y0

11 2Y1

10 2Y2

1Y3

GND

2Y3

(top view)

2007-10-01

12 3 4 5 6 7 8

中文翻译

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TC74VHC139FT	TOSHIBA	获取价格	DUAL 2-TO-S LINE DECODER
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TC74VHC139FT_12	TOSHIBA	获取价格	Dual 2-to-4 Line Decoder
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