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TC74VHC125FK_12 PDF预览

TC74VHC125FK_12

更新时间: 2024-11-17 01:06:31
品牌 Logo 应用领域
东芝 - TOSHIBA /
页数 文件大小 规格书
10页 227K
描述
Quad Bus Buffer

TC74VHC125FK_12 数据手册

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TC74VHC125,126F/FT/FK  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74VHC125F,TC74VHC125FT,TC74VHC125FK  
TC74VHC126F,TC74VHC126FT,TC74VHC126FK  
TC74VHC125F/FT/FK  
TC74VHC126F/FT/FK  
Quad Bus Buffer  
Quad Bus Buffer  
TC74VHC125F, TC74VHC126F  
TC74VHC125FT, TC74VHC126FT  
TC74VHC125FK, TC74VHC126FK  
The TC74VHC125/126 are high speed CMOS QUAD BUS  
BUFFERs fabricated with silicon gate C2MOS technology.  
They achieve the high speed operation similar to equivalent  
Bipolar Shottky TTL while maintaining the CMOS low power  
dissipation.  
The TC74VHC125 requires the 3-state control input G to be  
set high to place the output into the high impedance state,  
whereas the TC74VHC126 requires the control input G to be set  
low to place the output into high impedance.  
An input protection circuit ensures that 0 to 5.5 V can be  
applied to the input pins without regard to the supply voltage.  
This device can be used to interface 5 V to 3 V systems and two  
supply systems such as battery back up.  
This circuit prevents device destruction due to mismatched  
supply and input voltages.  
Features  
High speed: t = 3.8 ns (typ.) at V  
= 5 V  
pd  
CC  
Low power dissipation: I  
= 4 μA (max) at Ta = 25°C  
CC  
High noise immunity: V  
= V  
= 28% V  
(min)  
NIH  
NIL  
CC  
Power down protection is provided on all inputs.  
Balanced propagation delays: t  
t
pHL  
pLH  
Wide operating voltage range: V  
= 2 to 5.5 V  
CC (opr)  
Low noise: V  
= 0.8 V (max)  
OLP  
Pin and function compatible with 74ALS125/126  
Weight  
SOP14-P-300-1.27A  
: 0.18 g (typ.)  
TSSOP14-P-0044-0.65A : 0.06 g (typ.)  
VSSOP14-P-0030-0.50  
: 0.02 g (typ.)  
1
2012-02-29  

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