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TC74LVX373F_07 PDF预览

TC74LVX373F_07

更新时间: 2024-11-27 04:49:35
品牌 Logo 应用领域
东芝 - TOSHIBA 锁存器
页数 文件大小 规格书
9页 211K
描述
Octal D-Type Latch with 3-State Output

TC74LVX373F_07 数据手册

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TC74LVX373F/FT  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74LVX373F,TC74LVX373FT  
Octal D-Type Latch with 3-State Output  
TC74LVX373F  
The TC74LVX373F/ FT is a high-speed CMOS octal latch with  
3-state output fabricated with silicon gate CMOS technology.  
Designed for use in 3-V systems, it achieves high-speed operation  
while maintaining the CMOS low power dissipation.  
This device is suitable for low-voltage and battery operated  
systems.  
This 8 bit D-type latch is controlled by a latch enable input  
(LE) and an output enable input ( OE ). When the OE input is  
high, the eight outputs are in a high-impedance state.  
An input protection circuit ensures that 0 to 5.5V can be  
applied to the input pins without regard to the supply voltage.  
This device can be used to interface 5V to 3V systems and two  
supply systems such as battery back up. This circuit prevents  
device destruction due to mismatched supply and input voltages.  
TC74LVX373FT  
Features  
High-speed: t = 5.8 ns (typ.) (V  
= 3.3 V)  
pd  
CC  
Low power dissipation: I  
= 4 μA (max) (Ta = 25°C)  
CC  
Input voltage level: V = 0.8 V (max) (V  
= 3 V)  
= 3 V)  
Weight  
SOP20-P-300-1.27A  
TSSOP20-P-0044-0.65A  
IL  
CC  
CC  
: 0.22 g (typ.)  
: 0.08 g (typ.)  
V
IH  
= 2.0 V (min) (V  
Power-down protection provided on all inputs  
Balanced propagation delays: t  
t
pHL  
pLH  
Low noise: V  
= 0.8 V (max)  
OLP  
Pin and function compatible with 74HC373  
1
2007-10-17  

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