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TC74HCT00AP_07 PDF预览

TC74HCT00AP_07

更新时间: 2024-11-24 05:04:07
品牌 Logo 应用领域
东芝 - TOSHIBA
页数 文件大小 规格书
7页 254K
描述
Quad 2-Input NAND Gate

TC74HCT00AP_07 数据手册

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TC74HCT00AP/AF/AFN  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74HCT00AP,TC74HCT00AF,TC74HCT00AFN  
Quad 2-Input NAND Gate  
Note: xxxFN (JEDEC SOP) is not available in  
Japan.  
The TC74HCT00A is a high speed CMOS 2-INPUT NAND  
GATE fabricated with silicon gate C2MOS technology.  
TC74HCT00AP  
It achieves the high speed operation similar to equivalent  
LSTTL while maintaining the CMOS low power dissipation.  
This device may be used as a level converter for interfacing  
TTL or NMOS to High Speed CMOS. The inputs are compatible  
with TTL, NMOS and CMOS output voltage levels.  
The internal circuit is composed of 3 stages including buffer  
output, which provide high noise immunity and stable output.  
All inputs are equipped with protection circuits against static  
discharge or transient excess voltage.  
TC74HCT00AF  
Features  
High speed: t = 10 ns (typ.) at V  
= 5 V  
pd  
CC  
Low power dissipation: I  
= 1 μA (max) at Ta = 25°C  
CC  
Compatible with TTL outputs: V = 2 V (min)  
IH  
V
IL  
= 0.8 V (max)  
Wide interfacing ability: LSTTL, NMOS, CMOS  
Output drive capability: 10 LSTTL loads  
TC74HCT00AFN  
Symmetrical output impedance: |I | = I  
= 4 mA (min)  
OH  
OL  
Balanced propagation delays: t  
t
pHL  
pLH  
Pin and function compatible with 74LS00  
Pin Assignment  
Weight  
DIP14-P-300-2.54  
SOP14-P-300-1.27A  
SOL14-P-150-1.27  
: 0.96 g (typ.)  
: 0.18 g (typ.)  
: 0.12 g (typ.)  
1
2007-10-01  

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