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TC74HC40103AF(F) PDF预览

TC74HC40103AF(F)

更新时间: 2024-11-16 21:08:39
品牌 Logo 应用领域
东芝 - TOSHIBA /
页数 文件大小 规格书
14页 397K
描述
TC74HC40103AF(F)

TC74HC40103AF(F) 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:,Reach Compliance Code:unknown
风险等级:5.84Base Number Matches:1

TC74HC40103AF(F) 数据手册

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TC74HC40102,40103AP/AF  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74HC40102AP,TC74HC40102AF  
TC74HC40103AP,TC74HC40103AF  
TC74HC40102AP/AF Dual BCD Programmable Down Counter  
TC74HC40103AP/AF 8-Bit Binary Programmable Down Counter  
TC74HC40102AP, TC74HC40103AP  
The TC74HC40102A and TC74HC40103A are high speed  
CMOS PROGRAMMABLE DOWN COUNTERS fabricated with  
silicon gate C2MOS technology.  
They achieve the high speed operation similar to equivalent  
LSTTL while maintaining the CMOS low power dissipation.  
The output terminal (CO/ZD ) goes to an active low state when  
the down count reaches zero. Since the TC74HC40102A is  
designed as a BCD counter, programming up to 99 counts is  
possible. The TC74HC40103A, with its 8-bit binary construction,  
can be set to provide up to 255 counts.  
TC74HC40102AF, TC74HC40103AF  
Both devices have Inhibit Clock (CI/CE ), Asynchronous Preset  
Control ( APE ), Synchronous Preset ( SPE ) and Clear Control  
(CLR ) inputs for setting the counter to the maximum counting  
mode.  
All inputs are equipped with protection circuits against static  
discharge or transient excess voltage.  
Features  
Weight  
DIP16-P-300-2.54A  
SOP16-P-300-1.27A  
High speed: f  
40 MHz (typ.) at V  
= 5 V  
max  
CC  
: 1.00 g (typ.)  
: 0.18 g (typ.)  
Low power dissipation: I  
= 4 μA (max) at Ta = 25°C  
CC  
High noise immunity: V  
= V  
= 28% V  
(min)  
NIH  
NIL  
CC  
Output drive capability: 10 LSTTL loads  
Symmetrical output impedance: |I | = I  
= 4 mA (min)  
OL  
OH  
Balanced propagation delays: t  
t
pHL  
pLH  
Wide operating voltage range: V  
(opr) = 2 to 6 V  
CC  
Pin and function compatible with 40102B, 40103B  
Pin Assignment  
1
2007-10-01  

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