TAS5760M
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SLOS772B –JULY 2013–REVISED JULY 2013
PINOUT AND PIN DESCRIPTIONS
TSSOP PACKAGE
DCA-48
(TOP VIEW)
SFT_CLIP
ANA_REG
VCOM
ANA_REF
SPK_FAULT
SPK_SD
FREQ/SDA
PBTL/SCL
DVDD
1
2
3
4
5
6
7
8
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
GVDD_REG
GGND
AVDD
PVDD
PVDD
BSTRPA+
SPK_OUTA+
PGND
SPK_OUTA-
BSTRPA-
BSTRPB-
SPK_OUTB-
PGND
9
SPK_GAIN0
SPK_GAIN1
SPK_SLEEP/ADR
MCLK
10
11
12
13
14
15
16
17
18
19
SCLK
SDIN
LRCK
DGND
SPK_OUTB+
BSTRPB+
PVDD
PVDD
NC
NC
NC
PowerPAD
NC
NC
NC
NC
NC
NC
NC
NC
NC
20
21
22
23
24
29
28
27
26
25
NC
NC
Pin Descriptions
TAS5760M
Name
Internal
Termination
No. Type(1)
Description
AVDD
46
4
P
P
-
-
Power supply for internal analog circuitry
Connection point for internal reference used by ANA_REG and VCOM filter
capacitors
ANA_REF
Voltage regulator derived from AVDD supply (NOTE: This terminal is provided as a
connection point for filtering capacitors for this supply and must not be used to
power any external circuitry)
ANA_REG
2
P
-
Connection point for the SPK_OUTA- bootstrap capacitor, which is used to create a
power supply for the high-side gate drive for SPK_OUTA-
BSTRPA-
BSTRPA+
BSTRPB-
BSTRPB+
39
43
38
34
P
P
P
P
-
-
-
-
Connection point for the SPK_OUTA+ bootstrap capacitor, which is used to create a
power supply for the high-side gate drive for SPK_OUTA
Connection point for the SPK_OUTB- bootstrap capacitor, which is used to create a
power supply for the high-side gate drive for SPK_OUTB-
Connection point for the SPK_OUTB+ bootstrap capacitor, which is used to create a
power supply for the high-side gate drive for SPK_OUTB+
Ground for digital circuitry (NOTE: This terminal should be connected to the system
ground)
DGND
DVDD
17
9
G
P
-
-
Power supply for the internal digital circuitry
Weak Pull- Dual function terminal that functions as an I²C data input terminal in I²C Control
FREQ/SDA
7
DI
Down
Mode or as a Frequency Select terminal when in Hardware Control Mode.
Ground for gate drive circuitry (this terminal should be connected to the system
ground)
GGND
GVDD_REG
LRCK
47
48
16
G
P
-
Voltage regulator derived from PVDD supply (NOTE: This terminal is provided as a
connection point for filtering capacitors for this supply and must not be used to
power any external circuitry)
-
Weak Pull- Word select clock for the digital signal that is active on the serial port's input data
Down line
DI
(1) AI = Analog input, AO = Analog output, DI = Digital Input, DO = Digital Output, P = Power, G = Ground (0V)
Copyright © 2013, Texas Instruments Incorporated
3
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