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TA7S04-33GI PDF预览

TA7S04-33GI

更新时间: 2024-11-23 06:15:27
品牌 Logo 应用领域
其他 - ETC 外围集成电路
页数 文件大小 规格书
198页 1570K
描述
Triscend A7S Configurable System-on-Chip Platform

TA7S04-33GI 数据手册

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Triscend A7S Configurable  
System-on-Chip Platform  
®
August, 2002 (Version 1.10)  
Product Description  
Industry’s first complete 32-bit Configurable High-performance, 32-bit  
System-on-Chip (CSoC) ARM7TDMI RISC Processor  
High-performance, low-power consumption,  
Popular, industry-standard 32-  
32-bit RISC processor (ARM7TDMI™)  
bit RISC processor  
8Kbyte mixed instruction/data cache  
16Kbyte internal scratchpad RAM  
Binary and source code  
compatible with other ARM7/ARM7TDMI  
variants  
Next-generation embedded programmable  
Widespread C/C++ compiler, source-level  
logic architecture (up to 25,600 ASIC gates)  
debugger, and RTOS support  
High-performance dedicated internal bus  
(up to 455Mbytes per second at 60 MHz)  
Superior code density using the Thumb®  
instruction set  
External memory interface supporting  
54 MIPS (Dhrystone 2.1) at 60 MHz  
Low latency, real-time interrupt response  
Fast hardware multiplier  
32-bit register bank and ALU  
32-bit addressing 4Gbyte linear address  
32-bit barrel shifter  
Flash, EEPROM, SRAM, and SDRAM  
Advanced real-time, in-system debugging  
capability  
Stand-alone operation from a single  
external memory (code + initialization)  
2.5-volt core with 3.3- or 2.5-volt I/Os  
Four independent high-performance DMA  
EmbeddedICE™ on-chip debugger  
channels  
To external memory  
?
Clock Synthesizer  
Memory Interface  
Selector  
Selector  
Selector  
Selector  
Selector  
PIO  
PIO  
PIO  
PIO  
PIO  
PIO  
PIO  
Unit  
Power Control  
SDRAM Controller  
Static/Flash Interface  
Power-On Reset  
Configurable  
System Logic  
(CSL)  
16KBytes  
ScratchPad  
matrix  
SRAM  
ARM7TDMI  
Selector  
or  
Trace Buffer  
PIO  
Cache  
* 4-way Set Associative  
* Protection Unit  
* 8K Bytes  
CSI Bridge  
Configurable System  
Interconnect socket  
Standard Peripherals  
16-input  
Interrupt Controller  
Hardware  
Breakpoint Unit  
16-bit  
Timer  
16-bit  
Timer  
Four-channel  
DMA Controller  
CSI Bus  
Arbiter  
32-bit  
Watchdog Timer  
UART UART  
with FIFO with FIFO  
JTAG Interface  
Configurable System  
Interconnect (CSI) bus  
Figure 1. Block diagram of the Triscend A7S Configurable System-on-Chip (CSoC).  
© 2000-2002 by Triscend Corporation. All rights reserved.  
Patents Pending.  
TCH305-0001-002  

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