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T9310-100M-TL PDF预览

T9310-100M-TL

更新时间: 2024-11-20 19:50:59
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西迪斯 - CTS /
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T9310-100M-TL 数据手册

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Series T7250-T7258, T9250-T9258,  
T7001-T7013, T9301-T9313  
Extended Temperature/COTS  
XO, 3.3V  
RoHS Status  
Features  
20kHz to 100MHz frequency range  
5X7 SMD form factor  
Hermetically sealed for rugged environmental  
conditions  
Extremely wide operating temperature range  
accommodates harsh environments  
Crystals are processed with tight angle control to  
assure best frequency-temperature characteristics  
Units are vacuum baked before sealing at 175°C for  
16 hours to eliminate moisture traces and pre-age  
units for superior stability  
Tristate feature optional  
Equivalent 5V parts are available in T1250 series  
Solder coating of outer pads upon request  
Tinned pad parts are  
5/6 RoHs compliant  
Description  
Owing to their small size, light weight, and  
rugged characteristics, these 3.3V HCMOS  
extended temperature/COTS oscillators fulfill  
tasks not previously feasible. They are used in  
applications that take advantage of their  
extended temperature range and high  
performance. Twenty four different models (with  
and without tristate) cover -55°C to +200°C  
operation and provide frequency selection from  
20kHz to 100MHz. They combine excellent long-  
term reliability, loading characteristics, and  
superior startup performance.  
Applications  
Applications that require an HCMOS 3.3V clock  
and might be exposed to extremely harsh  
environmental conditions.  
Electrical Specifications  
Parameter  
Symbol  
Condition  
Min Typ  
Max  
Unit  
Note  
Frequency  
Range  
F
0.02  
100  
MHz  
Overall condition including calibration,  
temperature voltage and load  
variation  
Frequency  
Stability  
F/F  
±500  
ppm  
See Chart  
25  
Operating  
Temperature  
T
See Chart  
85C  
-55  
+200  
C  
First Year  
After First Year  
3
1
ppm  
ppm/yr  
Aging  
Supply  
Voltage  
VCC  
3.0  
3.3  
3.6  
20  
V
Supply  
Current  
mA  
All units, full range  
Loads 3 TTL loads, or 10 LSTTL loads, or 15pF CMOS  
Output  
TTL and LSTTL @ 1.4V  
CMOS, @ 50% VDD  
40/60  
40/60  
Symmetry  
%
TTL and LSTTL from 0.4 to 2.4V  
CMOS, 15 pF, from 0.4 to (VDD -0.4) V  
CMOS, 30 pF, from 0.4 to (VDD -0.4) V  
8
8
10  
Rise and Fall  
Times  
ns  
Input  
requirement  
for pin.1  
Output enable -  
Output disable (Tristate)  
pin 1 may float or 2.8V min  
pin 1 requires 0.4V max  
North America: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com  
Specifications are subject to change without notice.  
1
RevH0614  

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