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SY89834U PDF预览

SY89834U

更新时间: 2024-11-18 22:42:35
品牌 Logo 应用领域
麦瑞 - MICREL 输入元件
页数 文件大小 规格书
10页 106K
描述
2.5V/3.3V TWO INPUT , 1GHz LVTTL/CMOS-TO-LVPECL 1:4 FANOUT BUFFER/TRANSLATOR

SY89834U 数据手册

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2.5V/3.3V TWO INPUT , 1GHz  
LVTTL/CMOS-TO-LVPECL  
1:4 FANOUT BUFFER/TRANSLATOR  
Precision Edge™  
SY89834U  
FEATURES  
Guaranteed AC performance over temperature  
Precision Edge™  
and voltage:  
• > 1.0GHz f  
MAX  
• < 20ps within-device skew  
• < 225ps rise/fall times  
DESCRIPTION  
Low jitter design:  
The SY89834U is a high-speed, 2GHz LVTTL/CMOS-to-  
LVPECL fanout buffer/translator optimized for high-speed  
ultra-low skew applications. The input stage is designed to  
accept two single-ended LVTTL/CMOS compatible signals  
that feed into a 2:1 MUX. The selected input is translated  
and distributed as four differential 100K compatible LVPECL  
outputs. Within device skew is guaranteed to be less than  
20ps over supply voltage and temperature.  
• Cycle-to-cycle: < 1ps (rms)  
• Total jitter: < 10ps (pk-pk)  
Low voltage 2.5V and 3.3V supply operation  
Four differential 100k LVPECL outputs  
Wide operating temperature range: –40°C to +85°C  
Includes a 2:1 MUX select input  
The single-ended input buffers accept TTL/CMOS logic  
levels. The internal threshold of the buffers is defined as  
Accepts single-ended TTL/CMOS inputs and  
provides four LVPECL outputs  
V
/2  
CC  
.
Available in 16-pin (3mm × 3mm) MLF™ package  
The SY89834U is a part of Micrel's high-speed Precision  
Edge™ family. For applications that require a different I/O  
combination, consult Micrel's website at www.micrel.com,  
and choose from a comprehensive product line of high-  
speed, low-skew fanout buffers, translators and clock  
generators.  
APPLICATIONS  
FUNCTIONAL BLOCK DIAGRAM  
Processor clock distribution/translation  
SONET clock distribution/translation  
Q0  
Fibre Channel clock distribution/translation  
Gigabit Ethernet clock distribution/translation  
/Q0  
SEL  
Single-ended ASIC-to-differential communication  
Q1  
IC signal translation  
IN1  
/Q1  
(LVTTL/CMOS)  
1
MUX  
0
IN2  
Q2  
(LVTTL/CMOS)  
/Q2  
D
Q
EN  
Q3  
/Q3  
2 Single-Ended  
Clock/Data Inputs  
4 Differential  
LVPECL Outputs  
Precision Edge is a trademark of Micrel, Inc.  
MicroLeadFrame and MLF are trademarks of Amkor Technology, Inc.  
Rev.: C  
Amendment: /0  
1
Issue Date: February 2003  

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