SY10H601

更新时间： 2024-09-29 22:07:31

品牌	Logo	应用领域
麦瑞 - MICREL		/
页数	文件大小	规格书
4页	73K
描述
9-BIT ECL-TO-TTL WITH 3-STATE ENABLE

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数据手册

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SY10H601 数据手册

9-BIT ECL-TO-TTL

WITH 3-STATE ENABLE

SY10H601

SY100H601

DESCRIPTION

FEATURES

■ 9-bit ideal for byte-parity applications

■ 3-state TTL outputs

The SY10/100H601 are 9-bit, dual supply ECL-to-TTL

translators. Devices in the Micrel-Synergy 9-bit translator

series utilize the 28-lead PLCC for optimal power pinning,

signal flow-through and electrical performance.

The devices feature a 48mA TTL output stage and AC

performance is specified into both a 50pF and 200pF

load capacitance. For the 3-state output disable, both

ECL and TTL control inputs are provided, allowing

maximum design flexibility.

■ Flow-through configuration

■ Extra TTL and ECL power/ground pins to minimize

switching noise

■ ECL and TTL 3-state control inputs

■ 4.8ns max. delay into 50pF, 9.6ns into 200pF (all

outputs switching)

The 10H version is compatible with MECL 10KH ECL

logic levels. The 100H version is compatible with 100K

levels.

■ PNP TTL inputs for low loading

■ Choice of ECL compatibility: MECL 10KH (10Hxxx)

or 100K (100Hxxx)

■ Fully compatible with Motorola MC10H/100H601

■ Available in 28-pin PLCC package

BLOCK DIAGRAM

PIN CONFIGURATION

OEECL

OETTL

24 23 22 21 20 19

CCT

CCE

TOP VIEW

PLCC

GND

10 11

ECL

TTL

PIN NAMES

GND

Function

TTL Ground (0V)

VCCE

ECL VCC (0V)

VCCT

TTL Supply (+5.0V)

ECL Supply (–5.2/–4.5V)

Data Inputs (ECL)

Data Outputs (TTL)

3-State Control (ECL)

3-State Control (TTL)

VEE

D0–D8

Q0–Q8

OEECL

OETTL

Rev.: D

Amendment:/0

Issue Date: February, 1998

12 3 4

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