Datasheet > STC62WV256TC

STC62WV256TC

更新时间： 2022-12-09 03:25:33

品牌	Logo	应用领域
其他 - ETC		静态存储器
页数	文件大小	规格书
10页	385K
描述
VERY LOW POWER/VOLTAGE CMOS SRAM

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STC62WV256TC 数据手册

STC

STC62WV256

SWITCHING WAVEFORMS (READ CYCLE)

READ CYCLE1 ^(1,2,4)

ADDRESS

D _OUT

READ CYCLE2 ^(1,3,4)

ACS

(5)

CHZ

(5)

CLZ

D _OUT

READ CYCLE3 ^(1,4)

ADDRESS

OLZ

(5)

ACS

OHZ

(1,5)

CHZ

(5)

CLZ

D _OUT

NOTES:

1. WE is high in read Cycle.

2. Device is continuously selected when CE = V^IL

3. Address valid prior to or coincident with CE transition low.

4. OE = V^IL

5. Transition is measured 500mV from steady state with CL = 5pF as shown in Figure 1B.

The parameter is guaranteed but not 100% tested.

Revision 2.3

Jan. 2004

R0201-STC62WV256

1 2 3 456 7 8...10

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