Datasheet > STA003

STA003

更新时间： 2024-11-15 23:34:55

品牌	Logo	应用领域
其他 - ETC		解码器
页数	文件大小	规格书
32页	300K
描述
MPEG 2.5 LAYER III AUDIO DECODER

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

STA003 数据手册

STA003T

MPEG 2.5 LAYER III AUDIO DECODER

SINGLE CHIP MPEG2 LAYER 3 DECODER

SUPPORTING:

- All features specified for Layer III in ISO/IEC

11172-3 (MPEG 1 Audio) except 44.1KHz

Audio

- All features specified for Layer III 2 channels

in ISO/IEC13818-3.2 (MPEG 2 Audio) except

22.05KHz Audio

- Lower sampling frequencies syntax extension,

(not specified by ISO) called MPEG 2.5

except 11.025KHz Audio

SO28

DECODES LAYER III STEREO CHANNELS,

DUAL

CHANNEL,

SINGLE

CHANNEL

(MONO)

APPLICATIONS

SUPPORTING THE MPEG 1 & 2 SAMPLING

FREQUENCIES AND THE EXTENSION TO

MPEG 2.5:

STARMAN SATELLITE RADIO RECEIVER

48, 32, 24, 16, 12, 8 KHz

DESCRIPTION

ACCEPTS MPEG 2.5 LAYER III ELEMEN-

TARY COMPRESSED BITSTREAM WITH

DATA RATE FROM 8 Kbit/s UP TO 128 Kbit/s

DIGITAL VOLUME CONTROL

DIGITAL BASS & TREBLE CONTROL

SERIAL BITSTREAM INPUT INTERFACE

The STA003T is a fully integrated high flexibility

MPEG Layer III Audio Decoder, capable of de-

coding Layer III compressed elementary streams,

as specified in MPEG 1 and MPEG 2 ISO stand-

ards. The device decodes also elementary streams

compressed by using low sampling rates, as speci-

fied by MPEG 2.5.

STA003T receives the input data through a Serial

Input Interface. The decoded signal is a stereo,

mono, or dual channel digital output that can be

sent directly to a D/A converter, by the PCM Out-

put Interface. This interface is software program-

mable to adapt the STA003T digital output to the

most common DACs architectures used on the

market.

ANCILLARY DATA EXTRACTION VIA I2C IN-

TERFACE.

SERIAL PCM OUTPUT INTERFACE (I²S

AND OTHER FORMATS)

PLL FOR INTERNAL CLOCK AND FOR OUT-

PUT PCM CLOCK GENERATION

LOW POWER DATA ELABORATION FOR

POWER CONSUMPTION OPTIMISATION

CRC CHECK AND SYNCHRONISATION ER-

ROR DETECTION WITH SOFTWARE INDI-

CATORS

The functional STA003T chip partitioning is de-

scribed in Fig.1.

I²C CONTROL BUS

LOW POWER 3.3V CMOS TECHNOLOGY

14.72MHz EXTERNAL INPUT CLOCK OR

BUILT-IN XTAL OSCILLATOR

January 2002

1/32

12 3 4 5 6 7...32

中文翻译

下载PDF

与STA003相关器件

型号	品牌	获取价格	描述	数据表
STA003T	STMICROELECTRONICS	获取价格	MPEG 2.5 LAYER III AUDIO DECODER
STA003T013TR	STMICROELECTRONICS	获取价格	SPECIALTY CONSUMER CIRCUIT, PDSO28, ROHS COMPLIANT, SO-28
STA00REF11N07RWC0	AMPHENOL	获取价格	MIL Series Connector, Receptacle
STA00REF13N07RWCO	AMPHENOL	获取价格	MIL Series Connector
STA00REF15N07RWCO	AMPHENOL	获取价格	MIL Series Connector
STA00REF17N07RWC0	AMPHENOL	获取价格	MIL Series Connector, Receptacle
STA00REM11N07RWC0	AMPHENOL	获取价格	MIL Series Connector, Receptacle
STA00REM11N07RWCO	AMPHENOL	获取价格	MIL Series Connector
STA00REM15N07RWC0	AMPHENOL	获取价格	MIL Series Connector, Receptacle
STA00REM15N07RWCO	AMPHENOL	获取价格	MIL Series Connector