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ST72325C9T5/XXX PDF预览

ST72325C9T5/XXX

更新时间: 2024-11-16 09:25:27
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 微控制器
页数 文件大小 规格书
193页 1802K
描述
IC,MICROCONTROLLER,8-BIT,ST72 CPU,QFP,48PIN,PLASTIC

ST72325C9T5/XXX 技术参数

生命周期:ObsoleteReach Compliance Code:compliant
风险等级:5.84位大小:8
CPU系列:ST72JESD-30 代码:S-PQFP-G48
端子数量:48片上程序ROM宽度:8
最高工作温度:85 °C最低工作温度:-10 °C
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装等效代码:QFP48,.35SQ,20封装形状:SQUARE
封装形式:FLATPACK电源:3.3/5 V
认证状态:Not QualifiedRAM(字节):2048
ROM(单词):61440ROM可编程性:MROM
速度:8 MHz子类别:Microcontrollers
最大压摆率:8 mA表面贴装:YES
温度等级:OTHER端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
Base Number Matches:1

ST72325C9T5/XXX 数据手册

 浏览型号ST72325C9T5/XXX的Datasheet PDF文件第2页浏览型号ST72325C9T5/XXX的Datasheet PDF文件第3页浏览型号ST72325C9T5/XXX的Datasheet PDF文件第4页浏览型号ST72325C9T5/XXX的Datasheet PDF文件第5页浏览型号ST72325C9T5/XXX的Datasheet PDF文件第6页浏览型号ST72325C9T5/XXX的Datasheet PDF文件第7页 
ST72325  
8-BIT MCU WITH 16 TO 60K FLASH/ROM, ADC, CSS,  
FIVE TIMERS, SPI, SCI, I2C INTERFACE  
PRELIMINARY DATA  
Memories  
– 16K to 60K dual voltage High Density Flash  
(HDFlash) or up to 32K ROM with read-out  
protection capability. In-Application Program-  
ming and In-Circuit Programming for HDFlash  
devices  
TQFP64  
10 x 10  
TQFP44 TQFP48  
10 x 10 7 x 7  
TQFP32  
7 x 7  
– 512 to 2048 bytes RAM  
– HDFlash endurance: 100 cycles, data reten-  
tion: 40 years at 85°C  
Clock, Reset And Supply Management  
– Enhanced low voltage supervisor (LVD) for  
main supply and auxiliary voltage detector  
(AVD) with interrupt capability  
TQFP64  
14 x 14  
SDIP42  
600 mil  
SDIP32  
400 mil  
– Clock sources: crystal/ceramic resonator os-  
cillators, internal RC oscillator and bypass for  
external clock  
– 8-bit PWM Auto-reload timer with: 2 input cap-  
tures, 4 PWM outputs, output compare and  
time base interrupt, external clock with event  
detector  
– PLL for 2x frequency multiplication  
– Four Power Saving Modes: Halt, Active-Halt,  
3 Communications Interfaces  
Wait and Slow  
– SPI synchronous serial interface  
– SCI asynchronous serial interface  
– Clock Security System  
Interrupt Management  
2
– I C multimaster interface  
– Nested interrupt controller  
1 Analog peripheral (low current coupling)  
– 14 interrupt vectors plus TRAP and RESET  
– Top Level Interrupt (TLI) pin on 64-pin devices  
– 9/6 external interrupt lines (on 4 vectors)  
Up to 48 I/O Ports  
– 10-bit ADC with up to 16 robust input ports  
Instruction Set  
– 48/32/24 multifunctional bidirectional I/O lines  
– 34/22/17 alternate function lines  
– 16/12/10 high sink outputs  
5 Timers  
– 8-bit Data Manipulation  
– 63 Basic Instructions  
– 17 main Addressing Modes  
– 8 x 8 Unsigned Multiply Instruction  
– Main Clock Controller with: Real time base,  
Beep and Clock-out capabilities  
– Configurable watchdog timer  
– Two 16-bit timers with: 2 input captures, 2 out-  
put compares, external clock input on one tim-  
er, PWM and pulse generator modes  
Development Tools  
– Full hardware/software development package  
– DM (Debug module)  
Device Summary  
ST72325  
(C/J/K)4  
Program memory - bytes ROM 16K  
ST72325 ST72F325  
ST72F325  
(AR/C/J/K)6  
Flash 32K  
1024(256)  
ST72F325  
(R/AR/C/J)7  
Flash 48K  
1536 (256)  
ST72F325  
(R/AR/C/J)9  
Flash 60K  
2048(256)  
Features  
(C/J/K)6  
ROM 32K  
1024(256)  
(C/J/K)4  
Flash 16K  
512 (256)  
RAM (stack) - bytes  
Operating Voltage  
Temp. Range  
512 (256)  
3.8V to 5.5V  
up to -40°C to +125°C  
TQFP64 10x10 (AR),  
TQFP48 (C),  
TQFP44/ SDIP42 (J),  
TQFP32/DIP32 (K)  
TQFP48 (C), TQFP44/SDIP42 (J),  
TQFP32/DIP32 (K)  
TQFP64 14x14(R), TQFP64 10x10(AR),  
TQFP48 (C), TQFP44 (J)  
Package  
Rev. 1  
September 2005  
1/193  
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1  

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