Datasheet > SSM2602CPZ-REEL1

SSM2602CPZ-REEL1

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
亚德诺 - ADI		解码器编解码器
页数	文件大小	规格书
28页	448K
描述
Low Power Audio Codec

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SSM2602CPZ-REEL1 数据手册

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Preliminary Technical Data

SSM2602

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

PIN 1

INDICATOR

MCLK/XTI

XTO

DCVDD

DGND

DBVDD

INT/CLKOUT

BCLK

21 MICBIAS

20 VMID

19 AGND

18 AVDD

17 ROUT

16 LOUT

15 PGND

SSM2602

TOP VIEW

(Not to Scale)

Figure 2. Pin Configuration of SSM2602

Table 7. Pin Function Descriptions

Pin No.

Mnemonic

MCLK/XTI

XTO

DCVDD

DGND

DBVDD

CLKOUT

BCLK

DACDAT

DACLRC

Type

Description

Digital Input

Master Clock Input/Crystal Input

Crystal Output

Digital Core Supply

Digital Ground

Digital I/O Supply

Buffered Clock Output

Digital Audio Bit Clock. This pin is pulled down when the ACTIVE register is set to 0.

DAC Digital Audio Data Input

Digital Output

Digital Supply

Digital Ground

Digital Supply

Digital Output

Digital Input/Output

Digital Input

Digital Input/Output

DAC Sample Rate Clock (from Left and Right Channels). This pin is pulled down

when the ACTIVE register is set to 0.

ADCDAT

ADCLRC

Digital Output

Digital Input/Output

ADC Digital Audio Data Output

ADC Sample Rate Clock (from Left and Right Channels). This pin is pulled down

when the ACTIVE register is set to 0.

HPVDD

LHPOUT

RHPOUT

PGND

LOUT

ROUT

AVDD

AGND

VMID

MICBIAS

MICIN

RLINEIN

LLINEIN

MODE

CSB

Analog Supply

Analog Output

Analog Ground

Analog Output

Analog Supply

Analog Ground

Analog Output

Analog Input

Digital Input

Headphone Supply

Left-Channel Headphone Output

Right-Channel Headphone Output

Headphone Ground

Left-Channel Line Output

Right-Channel Line Output

Analog Supply

Analog Ground

Middle Voltage Decoupling Capacitor

Microphone Bias

Microphone Input Signal

Right-Channel Line/Microphone Input

Left-Channel Line/Microphone Input

Control Interface Selection to Select I²C®/SPI

3-Wire MPU Chip Select/2-Wire MPU Interface Address Selection, Active Low. This pin is

pulled up when the ACTIVE register is set to 0.

Digital Input

SDIN

SCLK

Digital Input/Output

Digital Input

3-Wire MPU Data Input/2-Wire MPU Data Input/Output

3-Wire MPU Clock Input/2-Wire MPU Clock Input

Rev. PrB | Page 7 of 28

1...4 5 678 9 10...28

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