Datasheet > SPXD2010VLQ120R

SPXD2010VLQ120R

更新时间： 2024-11-22 01:01:19

品牌	Logo	应用领域
飞思卡尔 - FREESCALE		微控制器
页数	文件大小	规格书
119页	667K
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PXS20 Microcontroller

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SPXD2010VLQ120R 数据手册

Freescale Semiconductor

Data Sheet: Advance Information

Document Number: PXS20

Rev. 1, 09/2011

PXS20

MAPBGA–225

QFN12

15 mm x 15 mm

##_mm_x_##mm

SOT-343R

##_mm_x_##mm

144 LQFP

PKG-TBD

PXS20 Microcontroller Data

Sheet

## mm x ## mm

TBD

257 MAPBGA

(20 x 20 x 1.4 mm)

(14 x 14 x 0.8 mm)

• GPIOs individually programmable as input, output or

special function

• High-performance e200z4d dual core

– 32-bit Power Architecture technology CPU

• Three 6-channel general-purpose eTimer units

• 2 FlexPWM units

– Four 16-bit channels per module

• Communications interfaces

– Core frequency as high as 120 MHz

– Dual issue five-stage pipeline core

– Variable Length Encoding (VLE)

– Memory Management Unit (MMU)

– 4 KB instruction cache with error detection code

– Signal processing engine (SPE)

– 2 LINFlexD channels

– 3 DSPI channels with automatic chip select generation

– 2 FlexCAN interfaces (2.0B Active) with 32 message

objects

• Memory available

– 1 MB flash memory with ECC

– FlexRay module (V2.1 Rev. A) with 2 channels, 64

message buffers and data rates up to 10 Mbit/s

• Two 12-bit analog-to-digital converters (ADCs)

– 16 input channels

– 128 KB on-chip SRAM with ECC

– Built-in RWW capabilities for EEPROM emulation

• SIL3/ASILD innovative safety concept: LockStep mode

and Fail-safe protection

– Programmable cross triggering unit (CTU) to

synchronize ADCs conversion with timer and PWM

• Sine wave generator (D/A with low pass filter)

• On-chip CAN/UART bootstrap loader

• Single 3.0 V to 3.6 V voltage supply

• Ambient temperature range –40 °C to 125 °C

• Junction temperature range –40 °C to 150 °C

– Sphere of replication (SoR) for key components (such as

CPU core, eDMA, crossbar switch)

– Fault collection and control unit (FCCU)

– Redundancy control and checker unit (RCCU) on

outputs of the SoR connected to FCCU

– Boot-time Built-In Self-Test for Memory (MBIST) and

Logic (LBIST) triggered by hardware

– Boot-time Built-In Self-Test for ADC and flash memory

triggered by software

– Replicated safety enhanced watchdog

– Replicated junction temperature sensor

– Non-maskable interrupt (NMI)

– 16-region memory protection unit (MPU)

– Clock monitoring units (CMU)

– Power management unit (PMU)

– Cyclic redundancy check (CRC) unit

• Decoupled Parallel mode for high-performance use of

replicated cores

• Nexus Class 3+ interface

• Interrupts

– Replicated 16-priority controller

– Replicated 16-channel eDMA controller

This document contains information on a product under development. Freescale reserves the

right to change or discontinue this product without notice.

Preliminary—Subject to Change Without Notice

12 3 4 5 6 7...119

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