Datasheet > SPEAR-09-B042

SPEAR-09-B042

更新时间： 2024-02-08 06:54:21

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		/
页数	文件大小	规格书
66页	923K
描述
SPEAr㈢ BASIC ARM 926EJ-S core, customizable logic, large IP portfolio SoC

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中文翻译

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技术参数
数据手册

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SPEAR-09-B042 技术参数

生命周期：	Obsolete	零件包装代码：	BGA
包装说明：	LFBGA, BGA289,17X17,32	针数：	289
Reach Compliance Code：	compliant	HTS代码：	8542.31.00.01
风险等级：	5.75	地址总线宽度：
边界扫描：	NO	最大时钟频率：	24 MHz
通信协议：	ASYNC, BIT	数据编码/解码方法：	NRZ
最大数据传输速率：	12.5 MBps	外部数据总线宽度：
JESD-30 代码：	S-PBGA-B289	长度：	15 mm
低功率模式：	YES	串行 I/O 数：	1
端子数量：	289	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	LFBGA	封装等效代码：	BGA289,17X17,32
封装形状：	SQUARE	封装形式：	GRID ARRAY, LOW PROFILE, FINE PITCH
电源：	1.2,2.5,3.3 V	认证状态：	Not Qualified
座面最大高度：	1.7 mm	子类别：	Other Microprocessor ICs
最大供电电压：	1.26 V	最小供电电压：	1.14 V
标称供电电压：	1.2 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子形式：	BALL	端子节距：	0.5 mm
端子位置：	BOTTOM	宽度：	15 mm
uPs/uCs/外围集成电路类型：	SERIAL IO/COMMUNICATION CONTROLLER, I2C BUS	Base Number Matches：	1

SPEAR-09-B042 数据手册

SPEAR-09-B042

SPEAr^®BASIC

ARM 926EJ-S core, customizable logic, large IP portfolio SoC

Preliminary Data

Features

■ ARM926EJ-S core @333 MHz

– 16 Kbyte instructions/data cache

■ Reconfigurable logic array:

– 300 Kgate (100% utilization rate)

– 102 I/O lines

– No clock domain limitation

LFBGA289

– 64 Kbyte + 8 Kbyte configurable memory

pool

■ Multilayer AMBA 2.0 compliant bus with f

MAX

■ 6 legacy GPIO bidirectional signals with

166 MHz

interrupt capability

■ 32-Kbyte boot ROM

■ ADC 10-bit, 1 Msps 8 inputs

■ 8 Kbyte common static RAM

– Hw supporting up to 13.5 bits at 8 KSPS by

oversampling and accumulation

– Shared with reconfigurable array

■ JPEG codec accelerator (1 clock/pixel)

■ C3 crypto accelerator

■ Dynamic power saving features

■ High performance DMA

– 8 channels

■ 3 pairs of 16-bit general purpose timers with

programmable prescaler

■ Ethernet 10/100 MAC with MII interface.

(IEEE-802.3)

■ Real-time clock

■ Watchdog

■ USB 2.0 device with integrated PHY

■ 2 USB 2.0 host with integrated PHY

■ System controller

■ External DRAM memory interface:

– 8/16-bit (LPDDR@166 MHz)

– 8/16-bit (DDR2@333 MHz)

– 2 banks available

■ Miscellaneous internal control registers

– SOC parameter configuration

■ JTAG (IEEE1149.1) interface

■ ETM9 interface

■ Flash interface:

■ Operating temperature: - 40 to 85 °C

■ Low power consumption technology

– SPI serial (up to 50 Mbps)

■ SPI master/slave up to 50 Mbps

– Compliant with Motorola, Texas

Description

instruments and National semiconductor

protocols

SPEAr BASIC is a powerful digital engine

belonging to SPEAr family, the innovative

customizable system-on-chip. The device

integrates an ARM 926 core with an extensive set

of proven IPs and a large configurable logic block

that allows very fast customization of unique

and/or proprietary solutions.

■ I C master/slave mode – high, fast and slow

speed

■ UARTs (up to 460.8 Kbps)

■ IrDA (FIR/MIR/SIR) compliant serial link from

9.6 Kbps to 4 Mbps speed-rate

May 2008

Rev 1

1/66

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to

change without notice.

www.st.com

12 3 4 5 6 7...66

中文翻译

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与SPEAR-09-B042相关器件

型号	品牌	获取价格	描述	数据表
SPEAR-09-H020	STMICROELECTRONICS	获取价格	IC,PERIPHERAL (MULTIFUNCTION) CONTROLLER,CMOS,BGA,420PIN
SPEAR-09-H022	STMICROELECTRONICS	获取价格	SPEAr Head ARM 926, 200K customizable eASIC gates, large IP portfolio SoC
SPEAR-09-H022_06	STMICROELECTRONICS	获取价格	SPEAr Head200 ARM 926, 200K customizable eASIC gates, large IP portfolio SoC
SPEAR-09-H042	STMICROELECTRONICS	获取价格	SPEAr⑩ Head200, ARM 926, 200 K customizable e
SPEAR-09-H122	STMICROELECTRONICS	获取价格	SPEAr TM Head600
SPEAR-09-H122_08	STMICROELECTRONICS	获取价格	SPEAr⑩ Head600
SPEAR-09-L0	STMICROELECTRONICS	获取价格	SPEAR-09-L0
SPEAR-09-P022	STMICROELECTRONICS	获取价格	SPEAr⑩ Plus600 dual processor cores
SPEAR1310	STMICROELECTRONICS	获取价格	Dual-core Cortex A9 embedded MPU for communications
SPEAR1310-2	STMICROELECTRONICS	获取价格	SPEAR1310-2

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