Datasheet > SPEAR-09-L0

SPEAR-09-L0

更新时间： 2024-01-11 02:52:23

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		/
页数	文件大小	规格书
5页	212K
描述
SPEAR-09-L0

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中文翻译

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技术参数
数据手册

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SPEAR-09-L0 技术参数

生命周期：	Obsolete	Reach Compliance Code：	compliant
风险等级：	5.84	Base Number Matches：	1

SPEAR-09-L0 数据手册

SPEAr-09-L0

SPEAr™ Lite

ARM 946, 400K gates eASIC™, large IP portfolio SoC

DATA BRIEF

Features

■ ARM946-ES f_MAX= 192MHz

■ 400K equivalent customizable gates with 123

dedicated GP I/Os

■ AMBA 2.0 compliant Bus f_MAX= 96MHz

■ Clock Generator

■ SDRAM, SRAM, FLASH interfaces

■ 2 USB Host 2.0 ports + PHY interfaces

■ USB Device 2.0 + PHY interface

■ Ethernet 10/100

PBGA568 (35x35mm)

Description

■ UART

SPEAr™ Lite is the first innovative customizable

SoC.

■ I²C

Part of the SPEAr™ family, the device integrates

an ARM core with a full set of proven IPs

(Intellectual Properties) and a configurable logic

block that allows very fast customization of unique

and/or proprietary solutions with low effort and low

costs.

■ 6 General Purpose I/Os

■ ADC 8 bits, 3Msps, 16 analog input channels

■ Watchdog

■ 2 General Purpose Timers

Order codes

Part number

Package

SPEAr-09-L0

PBGA568 (35x35mm)

Ethernet

LEDs, Keyboard, LVDS

I²C

Customizable Logic

DSC

ROM, Flash, SRAM

SPEAr™ Lite

SDRAM

AFE interface for

Scanner, CIS, LCD, MPF

Structured Processor Enhanced Architecture

Rev 2

1/5

September 2005

CD00063268

For further information contact your local STMicroelectronics sales office.

www.st.com

12 3 4 5

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