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SNJ74HC240 PDF预览

SNJ74HC240

更新时间： 2024-11-16 04:03:31
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
15页 491K
描述
OCTAL BUFFERS AND DRIVERS WITH 3-STATE OUTPUTS

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SNJ74HC240 数据手册

 浏览型号SNJ74HC240的Datasheet PDF文件第2页浏览型号SNJ74HC240的Datasheet PDF文件第3页浏览型号SNJ74HC240的Datasheet PDF文件第4页浏览型号SNJ74HC240的Datasheet PDF文件第5页浏览型号SNJ74HC240的Datasheet PDF文件第6页浏览型号SNJ74HC240的Datasheet PDF文件第7页 
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SCLS128D − DECEMBER 1982 − REVISED AUGUST 2003  
D
D
Wide Operating Voltage Range of 2 V to 6 V  
D
D
D
6-mA Output Drive at 5 V  
High-Current Outputs Drive Up To 15  
LSTTL Loads  
Low Input Current of 1 µA Max  
3-State Outputs Drive Bus Lines or Buffer  
Memory Address Registers  
D
Low Power Consumption, 80-µA Max I  
CC  
D
Typical t = 9 ns  
pd  
SN54HC240 . . . J OR W PACKAGE  
SN74HC240 . . . DB, DW, N, NS, OR PW PACKAGE  
(TOP VIEW)  
SN54HC240 . . . FK PACKAGE  
(TOP VIEW)  
1OE  
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
GND  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
2A2  
1Y4  
2A1  
3
2
1
20 19  
18  
1A2  
2Y3  
1A3  
2Y2  
1A4  
1Y1  
2A4  
1Y2  
2A3  
4
5
6
7
8
17  
16  
15  
14 1Y3  
9 10 11 12 13  
description/ordering information  
These octal buffers and line drivers are designed specifically to improve both the performance and density of  
3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC240  
devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low,  
the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the  
high-impedance state.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
PDIP − N  
Tube of 20  
Tube of 25  
Reel of 2000  
Reel of 2000  
Reel of 2000  
Tube of 70  
Reel of 2000  
Reel of 250  
Tube of 20  
Tube of 85  
Tube of 55  
SN74HC240N  
SN74HC240N  
SN74HC240DW  
SN74HC240DWR  
SN74HC240NSR  
SN74HC240DBR  
SN74HC240PW  
SN74HC240PWR  
SN74HC240PWT  
SNJ54HC240J  
SOIC − DW  
HC240  
SOP − NS  
HC240  
HC240  
−40°C to 85°C  
SSOP − DB  
TSSOP − PW  
HC240  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54HC240J  
SNJ54HC240W  
SNJ54HC240FK  
SNJ54HC240W  
SNJ54HC240FK  
−55°C to 125°C  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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Copyright 2003, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...15

中文翻译

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