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SNJ54LS125AW PDF预览

SNJ54LS125AW

更新时间: 2024-11-15 22:59:15
品牌 Logo 应用领域
德州仪器 - TI 输出元件
页数 文件大小 规格书
18页 578K
描述
QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS

SNJ54LS125AW 技术参数

生命周期:Active零件包装代码:DFP
包装说明:DFP, FL14,.3针数:14
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:26 weeks
风险等级:5.34控制类型:ENABLE LOW
计数方向:UNIDIRECTIONAL系列:LS
JESD-30 代码:R-GDFP-F14长度:9.21 mm
负载电容(CL):45 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A位数:1
功能数量:4端口数量:2
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DFP封装等效代码:FL14,.3
封装形状:RECTANGULAR封装形式:FLATPACK
包装方法:TUBE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):20 mA
Prop。Delay @ Nom-Sup:18 ns传播延迟(tpd):18 ns
认证状态:Not Qualified筛选级别:MIL-PRF-38535
座面最大高度:2.03 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:MILITARY
端子形式:FLAT端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5.97 mmBase Number Matches:1

SNJ54LS125AW 数据手册

 浏览型号SNJ54LS125AW的Datasheet PDF文件第2页浏览型号SNJ54LS125AW的Datasheet PDF文件第3页浏览型号SNJ54LS125AW的Datasheet PDF文件第4页浏览型号SNJ54LS125AW的Datasheet PDF文件第5页浏览型号SNJ54LS125AW的Datasheet PDF文件第6页浏览型号SNJ54LS125AW的Datasheet PDF文件第7页 
SN54125, SN54126, SN54LS125A, SN54LS126A,  
SN74125, SN74126, SN74LS125A, SN74LS126A  
QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS  
The SN54125, SN54126, SN74125,  
SN74126, and SN54LS126A are  
obsolete and are no longer supplied.  
SDLS044A – DECEMBER 1983 – REVISED MARCH 2002  
SN54125, SN54126, SN54LS125A,  
SN54LS126A . . . J OR W PACKAGE  
SN74125, SN74126 . . . N PACKAGE  
SN74LS125A, SN74LS126A . . . D, N, OR NS PACKAGE  
(TOP VIEW)  
Quad Bus Buffers  
3-State Outputs  
Separate Control for Each Channel  
description  
1G, 1G*  
1A  
1Y  
2G, 2G*  
2A  
V
CC  
4G, 4G*  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
These bus buffers feature three-state outputs  
that, when enabled, have the low impedance  
characteristics of a TTL output with additional  
drive capability at high logic levels to permit  
driving heavily loaded bus lines without external  
pullup resistors. When disabled, both output  
4A  
4Y  
3G, 3G*  
3A  
3Y  
2Y  
GND  
8
transistors are turned off, presenting  
a
high-impedance state to the bus so the output will  
actneitherasasignificantloadnorasadriver. The  
’125 and ’LS125A devices’ outputs are disabled  
when G is high. The ’126 and ’LS126A devices’  
outputs are disabled when G is low.  
*G on ’125 and ’LS125A devices;  
G on 126 and ’LS126A devices  
SN54LS125A, SN54LS126A . . . FK PACKAGE  
(TOP VIEW)  
3
2
1
20 19  
18  
4A  
NC  
4Y  
NC  
1Y  
NC  
4
5
6
7
8
17  
16  
15  
2G, 2G*  
NC  
14 3G, 3G*  
9 10 11 12 13  
2A  
*G on ’125 and ’LS125A devices;  
G on 126 and ’LS126A devices  
NC – No internal connection  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2002, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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