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SNJ54ALS137AW

更新时间： 2024-11-17 23:03:19
品牌 Logo 应用领域
德州仪器 - TI 解码器解复用器锁存器双倍数据速率
页数 文件大小 规格书
15页 516K
描述
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS WITH ADDRESS LATCHES

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SNJ54ALS137AW 数据手册

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SN54ALS137A, SN74ALS137A, SN74AS137  
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS  
WITH ADDRESS LATCHES  
SDAS203C – APRIL 1982 – REVISED JANUARY 1995  
SN54ALS137A . . . J PACKAGE  
SN74ALS137A, SN74AS137 . . . D OR N PACKAGE  
(TOP VIEW)  
• Combines Decoder and 3-Bit Address  
Latch  
• Incorporates Two Output Enables to  
Simplify Cascading  
A
B
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
• Package Options Include Plastic Small-  
Outline (D) Packages, Ceramic Chip  
Carriers (FK), and Standard Plastic (N) and  
Ceramic (J) 300-mil DIPs  
Y0  
Y1  
Y2  
Y3  
Y4  
Y5  
Y6  
C
LE  
G2  
G1  
Y7  
description  
GND  
The SN54ALS137A, SN74ALS137A, and  
SN74AS137 are 3-line to 8-line decoders/  
demultiplexers with latches on the three address  
inputs. When the latch-enable (LE) input is low,  
the devices act as decoders/demultiplexers.  
When LE goes from low to high, the address  
present at the select (A, B, and C) inputs is stored  
in the latches. Further address changes are  
ignored as long as LE remains high. The  
output-enable controls (G1 and G2) control the  
outputs independently of the select or  
latch-enable inputs. All of the outputs are forced  
high if G1 is low or G2 is high. These devices are  
ideally suited for implementing glitch-free  
decoders in strobed (stored-address) applications  
in bus-oriented systems.  
SN54ALS137A . . . FK PACKAGE  
(TOP VIEW)  
3
2
1
20 19  
18 Y1  
C
LE  
4
5
6
7
8
17  
16  
15  
14  
Y2  
NC  
Y3  
Y4  
NC  
G2  
G1  
9 10 11 12 13  
NC – No internal connection  
The SN54ALS137A is characterized for operation  
over the full military temperature range of –55°C  
to 125°C. The SN74ALS137A and SN74AS137  
are characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
ENABLE  
SELECT  
LE  
X
X
L
G1  
X
G2  
C
X
X
L
B
X
X
L
A
X
X
L
Y0  
H
H
L
Y1  
H
H
H
L
Y2  
H
H
H
H
L
Y3  
H
H
H
H
H
L
Y4  
H
H
H
H
H
H
L
Y5  
H
H
H
H
H
H
H
L
Y6  
H
H
H
H
H
H
H
H
L
Y7  
H
X
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
L
L
H
H
H
H
H
H
H
H
H
L
L
L
H
L
H
H
H
H
H
H
H
L
L
H
H
L
H
H
H
H
H
H
L
L
H
L
H
H
H
H
H
L
H
H
H
H
X
H
H
H
H
L
L
H
L
H
H
H
L
H
H
X
H
H
L
H
X
H
H
Outputs corresponding to stored address = L; all others = H  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...15

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