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SN75ALS165N3 PDF预览

SN75ALS165N3

更新时间： 2024-09-20 19:53:03
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管接口集成电路驱动器
页数 文件大小 规格书
11页 182K
描述
OCTAL LINE TRANSCEIVER, PDIP20

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SN75ALS165N3 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：DIP,Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.82差分输出：NO
驱动器位数：1输入特性：SCHMITT TRIGGER
接口集成电路类型：LINE TRANSCEIVER接口标准：IEEE-488
JESD-30 代码：R-PDIP-T20长度：24.325 mm
功能数量：8端子数量：20
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装形状：RECTANGULAR封装形式：IN-LINE
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
最大接收延迟：14 ns接收器位数：1
座面最大高度：5.08 mm最大供电电压：5.25 V
最小供电电压：4.75 V标称供电电压：5 V
表面贴装：NO技术：TTL
温度等级：COMMERCIAL端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED最大传输延迟：20 ns
宽度：7.62 mmBase Number Matches：1

SN75ALS165N3 数据手册

 浏览型号SN75ALS165N3的Datasheet PDF文件第2页浏览型号SN75ALS165N3的Datasheet PDF文件第3页浏览型号SN75ALS165N3的Datasheet PDF文件第4页浏览型号SN75ALS165N3的Datasheet PDF文件第5页浏览型号SN75ALS165N3的Datasheet PDF文件第6页浏览型号SN75ALS165N3的Datasheet PDF文件第7页 
SN75ALS165  
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER  
SLLS023B – JUNE 1986 – REVISED AUGUST 1989  
MEETS IEEE STANDARD 488-1978 (GPIB)  
DW OR N PACKAGE  
(TOP VIEW)  
8-Channel Bidirectional Transceiver  
High-Speed Advanced Low-Power Schottky  
Circuitry  
TE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
D1  
D2  
D3  
D4  
D5  
D6  
Low Power Dissipation . . . 46 mW Max Per  
Channel  
GPIB  
I/O Ports  
Terminal  
I/O Ports  
Fast Propagation Times . . . 20 ns Max  
High-Impedance PNP Inputs  
13 D7  
12 D8  
Receiver Hysteresis . . . 650 mV Typ  
No Loading of Bus When Device Is  
11  
GND  
PE  
Powered Down (V  
= 0)  
CC  
NOT RECOMMENDED FOR NEW DESIGN  
Function Tables  
Power-Up/Power-Down Protection  
(Glitch Free)  
Driver and Receiver Can Be Disabled  
Simultaneously  
EACH DRIVER  
EACH RECEIVER  
INPUTS  
TE PE  
INPUTS  
TE PE  
OUTPUT  
B
OUTPUT  
D
D
B
description  
H
L
H
X
H
H
X
L
H
X
L
H
L
L
H
X
X
L
L
H
X
H
H
X
L
L
H
Z
Z
†
The SN75ALS165 eight-channel general-  
purpose interface bus transceiver is a monolithic,  
high-speed,advancedlow-powerSchottkydevice  
designed for two-way data communications over  
single-ended transmission lines. It is designed to  
meet the requirements of IEEE Standard  
488-1978. The transceiver features driver outputs  
Z
Z
†
X
H = high level,  
Z = high-impedance state  
This is the high-impedance state of a normal 3-state output  
modified by the internal resistors to V and GND.  
L = low level,  
X = irrelevant,  
†
CC  
that can be operated in either the passive-pullup or 3-state mode. If talk enable (TE) is high, these ports have  
the characteristics of passive-pullup outputs when pullup enable (PE) is low and of 3-state outputs when PE  
is high. Taking TE low places these ports in the high-impedance state. Taking TE and PE low places both the  
drivers and receivers in the high-impedance state. The driver outputs are designed to handle loads up to 48 mA  
of sink current.  
An active turn-off feature is incorporated into the bus-terminating resistors so that the device exhibits a high  
impedance to the bus when V = 0. When combined with the SN75ALS161 or SN75ALS162 management bus  
CC  
transceiver, the pair provides the complete 16-wire interface for the IEEE 488 bus.  
The SN75ALS165 is manufactured in a 20-pin package and is characterized for operation from 0°C to 70°C.  
Copyright 1989, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...11

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