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SN75182J-00 PDF预览

SN75182J-00

更新时间： 2024-11-27 15:52:23
品牌 Logo 应用领域
德州仪器 - TI 接口集成电路
页数 文件大小 规格书
24页 930K
描述
DUAL LINE RECEIVER, CDIP14

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SN75182J-00 技术参数

生命周期：ObsoleteReach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.61Is Samacsys：N
其他特性：BUILT-IN LINE TERMINATION; RESPONSE CONTROL输入特性：DIFFERENTIAL
接口集成电路类型：LINE RECEIVER接口标准：GENERAL PURPOSE
JESD-30 代码：R-GDIP-T14长度：19.56 mm
功能数量：2端子数量：14
最高工作温度：70 °C最低工作温度：
输出特性：TOTEM-POLE输出极性：TRUE
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DIP
封装形状：RECTANGULAR封装形式：IN-LINE
认证状态：Not Qualified最大接收延迟：45 ns
接收器位数：1座面最大高度：5.08 mm
最大压摆率：28 mA最大供电电压：5.5 V
最小供电电压：4.5 V标称供电电压：5 V
表面贴装：NO技术：BIPOLAR
温度等级：COMMERCIAL端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
宽度：7.62 mmBase Number Matches：1

SN75182J-00 数据手册

 浏览型号SN75182J-00的Datasheet PDF文件第2页浏览型号SN75182J-00的Datasheet PDF文件第3页浏览型号SN75182J-00的Datasheet PDF文件第4页浏览型号SN75182J-00的Datasheet PDF文件第5页浏览型号SN75182J-00的Datasheet PDF文件第6页浏览型号SN75182J-00的Datasheet PDF文件第7页 
SN55182, SN75182  
DUAL DIFFERENTIAL LINE RECEIVERS  
SLLS092D – OCTOBER 1972 – REVISED APRIL 1998  
SN55182 . . . J OR W PACKAGE  
SN75182 . . . N PACKAGE  
(TOP VIEW)  
Single 5-V Supply  
Differential Line Operation  
Dual Channels  
1IN–  
V
1
2
3
4
5
6
7
14  
13  
TTL Compatibility  
CC  
1R  
2IN–  
T
±15-V Common-Mode Input Voltage Range  
±15-V Differential Input Voltage Range  
Individual Channel Strobes  
Built-In Optional Line-Termination Resistor  
Individual Frequency Response Controls  
1IN+  
1STRB  
1RTC  
1OUT  
GND  
12 2R  
T
11 2IN+  
10  
9
2STRB  
2RTC  
2OUT  
8
Designed for Use With Dual Differential  
Drivers SN55183 and SN75183  
SN55182 . . . FK PACKAGE  
(TOP VIEW)  
Designed to Be Interchangeable With  
National Semiconductor DS7820A and  
DS8820A  
3
2
1 20 19  
18  
2R  
1IN+  
NC  
4
5
6
7
8
description  
T
NC  
17  
16  
15  
14  
The SN55182 and SN75182 dual differential line  
receivers are designed to sense small differential  
signals in the presence of large common-mode  
noise. These devices give TTL-compatible output  
signals as a function of the polarity of the  
differential input voltage. The frequency response  
of each channel can be easily controlled by a  
single external capacitor to provide immunity to  
differential noise spikes. The output goes to a high  
level when the inputs are open circuited. A strobe  
input (STRB) is provided that, when in the low  
level, disables the receiver and forces the output  
to a high level.  
2IN+  
NC  
1STRB  
NC  
2STRB  
1RTC  
9 10 11 12 13  
NC – No internal connection  
THE SN55182 IS NOT RECOMMENDED  
FOR NEW DESIGNS  
The receiver is of monolithic single-chip construction, and both halves of the dual circuits use common  
power-supply and ground terminals.  
The SN55182 is characterized for operation over the full military temperature range of –55°C to 125°C. The  
SN75182 is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
INPUTS  
STRB  
OUTPUT  
OUT  
V
ID  
L
H
H
X
H
L
H
H
L
H = V ≥ V min or V more  
I
IH  
ID  
positive than V  
max  
TH  
L = V ≤ V max or V  
more  
I
IL  
ID  
negative than V max  
TL  
X = irrelevant  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...24

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