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SN74LVTH540PWE4 PDF预览

SN74LVTH540PWE4

更新时间: 2024-02-19 23:01:10
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SN74LVTH540PWE4 数据手册

 浏览型号SN74LVTH540PWE4的Datasheet PDF文件第2页浏览型号SN74LVTH540PWE4的Datasheet PDF文件第3页浏览型号SN74LVTH540PWE4的Datasheet PDF文件第4页浏览型号SN74LVTH540PWE4的Datasheet PDF文件第5页浏览型号SN74LVTH540PWE4的Datasheet PDF文件第6页浏览型号SN74LVTH540PWE4的Datasheet PDF文件第7页 
ꢋ ꢌꢋ ꢍꢅ ꢎꢏꢆ ꢐ ꢑꢆꢎꢄ ꢏꢒꢓ ꢓ ꢔꢕꢀ ꢖ ꢗꢕ ꢘ ꢅꢔ ꢕ  
SCBS681G − MARCH 1997 − REVISED OCTOBER 2003  
SN54LVTH540 . . . J OR W PACKAGE  
SN74LVTH540 . . . DB, DW, NS, OR PW PACKAGE  
(TOP VIEW)  
D
D
D
D
D
Support Mixed-Mode Signal Operation (5-V  
Input and Output Voltages With 3.3-V V  
)
CC  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
= 3.3 V, T = 25°C  
A
OE1  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
V
CC  
OE2  
Y1  
1
2
3
4
5
6
7
8
9
20  
19  
18  
Support Unregulated Battery Operation  
Down to 2.7 V  
17 Y2  
16 Y3  
15 Y4  
14 Y5  
13 Y6  
12 Y7  
11 Y8  
I
and Power-Up 3-State Support Hot  
off  
Insertion  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
D
D
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
GND 10  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
SN54LVTH540 . . . FK PACKAGE  
(TOP VIEW)  
description/ordering information  
3
2
1 20 19  
18  
These octal buffers/drivers are designed  
Y1  
Y2  
Y3  
Y4  
Y5  
A3  
A4  
A5  
A6  
A7  
4
5
6
7
8
specifically for low-voltage (3.3-V) V  
operation,  
CC  
17  
16  
15  
14  
but with the capability to provide a TTL interface  
to a 5-V system environment.  
The ’LVTH540 devices are ideal for driving bus  
lines or buffer-memory address registers. These  
devices feature inputs and outputs on opposite  
sides of the package that facilitate printed circuit  
board layout.  
9 10 11 12 13  
ORDERING INFORMATION  
ORDERABLE  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PART NUMBER  
SN74LVTH540DW  
SN74LVTH540DWR  
SN74LVTH540NSR  
SN74LVTH540DBR  
SN74LVTH540PW  
SN74LVTH540PWR  
SNJ54LVTH540J  
Tube  
SOIC − DW  
LVTH540  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SOP − NS  
LVTH540  
LXH540  
−40°C to 85°C  
SSOP − DB  
TSSOP − PW  
LXH540  
Tape and reel  
Tube  
CDIP − J  
CFP − W  
LCCC - FK  
SNJ54LVTH540J  
SNJ54LVTH540W  
SNJ54LVTH540FK  
−55°C to 125°C  
Tube  
SNJ54LVTH540W  
SNJ54LVTH540FK  
Tube  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢒ ꢁ ꢄꢔꢀꢀ ꢐ ꢆꢇ ꢔꢕꢙ ꢘꢀ ꢔ ꢁ ꢐꢆꢔꢗ ꢛꢜ ꢝꢞ ꢟꢠꢡ ꢢꢣꢤ ꢥꢛ ꢡꢠ ꢥꢛꢦ ꢝꢥꢞ ꢚꢕ ꢐ ꢗ ꢒ ꢑꢆ ꢘꢐ ꢁ  
ꢨꢣ  
ꢞꢛ  
ꢩꢦ ꢨ ꢦ ꢣ ꢤ ꢛ ꢤ ꢨ ꢞ ꢌ  
ꢤꢞ  
ꢡꢤ  
ꢞꢛ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74LVTH540PWE4 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVTH540PWR TI

完全替代

具有总线保持、TTL 兼容型 CMOS 输入和三态输出的 8 通道、2.7V 至 3.6V
SN74LVTH540PW TI

完全替代

3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

与SN74LVTH540PWE4相关器件

型号 品牌 获取价格 描述 数据表
SN74LVTH540PWLE TI

获取价格

3.3V ABT Octal Buffers/Drivers With 3-State Outputs 20-TSSOP -40 to 85
SN74LVTH540PWR TI

获取价格

具有总线保持、TTL 兼容型 CMOS 输入和三态输出的 8 通道、2.7V 至 3.6V
SN74LVTH541 TI

获取价格

3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVTH541DB TI

获取价格

3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVTH541DBLE TI

获取价格

3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVTH541DBR TI

获取价格

3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVTH541DBRE4 TI

获取价格

3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVTH541DBRG4 TI

获取价格

LVT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, SSOP-20
SN74LVTH541DW TI

获取价格

3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVTH541DWE4 TI

获取价格

3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS