ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢊꢋ ꢌ ꢇ
ꢈ ꢋꢄ ꢍꢁꢎ ꢏ ꢐ ꢉ ꢋꢄ ꢍꢁꢎ ꢑꢎꢆ ꢐꢑ ꢎꢒꢓ ꢑꢎꢔ ꢕꢄꢏꢍ ꢖ ꢄꢎ ꢗꢎ ꢒ
SCAS708A − SEPTEMBER 2003 − REVISED MAY 2004
D
Qualification in Accordance With
AEC-Q100
D
Typical V
(Output V
= 3.3 V, T = 25°C
Undershoot)
OHV
OH
†
>2 V at V
CC A
D
Qualified for Automotive Applications
D OR PW PACKAGE
(TOP VIEW)
D
Customer-Specific Configuration Control
Can Be Supported Along With
Major-Change Approval
1
2
3
4
5
6
7
8
16
15
14
V
Y0
Y1
A
B
C
CC
D
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
13 Y2
12
G2A
G2B
G1
Y7
GND
Y3
D
D
D
D
Operates From 2 V to 3.6 V
11 Y4
10 Y5
Inputs Accept Voltages to 5.5 V
Max t of 5.8 ns at 3.3 V
pd
9
Y6
Typical V
<0.8 V at V
(Output Ground Bounce)
OLP
CC
= 3.3 V, T = 25°C
A
†
Contact factory for details. Q100 qualification data available on
request.
description/ordering information
The SN74LVC138A 3-line to 8-line decoder/demultiplexer is designed for 2.7-V to 3.6-V V
operation.
CC
The device is designed for high-performance memory-decoding or data-routing applications requiring very
short propagation delay times. In high-performance memory systems, this decoder minimizes the effects of
system decoding. When employed with high-speed memories utilizing a fast enable circuit, delay times of this
decoder and the enable time of the memory usually are less than the typical access time of the memory. This
means that the effective system delay introduced by the decoder is negligible.
The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two
active-low enable inputs and one active-high enable input reduce the need for external gates or inverters when
expanding. A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires
only one inverter. An enable input can be used as a data input for demultiplexing applications.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator
in a mixed 3.3-V/5-V system environment.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
‡
PACKAGE
T
A
SOIC − D
Reel of 2500
Reel of 2000
SN74LVC138AQDRQ1
SN74LVC138AQPWRQ1
L138AQ1
L138AQ1
−40°C to 125°C
TSSOP − PW
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available
at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2004, Texas Instruments Incorporated
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1
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