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SN74LS623N PDF预览

SN74LS623N

更新时间: 2024-11-28 23:03:15
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 总线驱动器总线收发器逻辑集成电路光电二极管输出元件输入元件
页数 文件大小 规格书
3页 74K
描述
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUT

SN74LS623N 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP,
针数:20Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.51
Is Samacsys:N其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; MIN INPUT HYSTERESIS = 0.2V
系列:LSJESD-30 代码:R-PDIP-T20
JESD-609代码:e0长度:26.415 mm
负载电容(CL):45 pF逻辑集成电路类型:BUS TRANSCEIVER
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED最大电源电流(ICC):90 mA
传播延迟(tpd):15 ns认证状态:Not Qualified
座面最大高度:4.57 mm最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

SN74LS623N 数据手册

 浏览型号SN74LS623N的Datasheet PDF文件第2页浏览型号SN74LS623N的Datasheet PDF文件第3页 
SN54/74LS623  
OCTAL BUS TRANSCEIVER  
WITH 3-STATE OUTPUT  
The SN54/74LS623 series is an octal bus transceiver designed for  
asynchronous two-way communication between data buses. Control function  
implementation allows maximum timing flexibility. Enable inputs may be used  
to disable the device so that buses are effectively isolated. Depending on the  
Logic Levels at the enable inputs, Data transmission is allowed from the A bus  
to the B bus or from the B bus to the A bus. The dual-enable configuration  
gives the LS623 the capability to store data by simultaneous enabling of GBA  
and GAB. Each output reinforces its input in this transceiver configuration.  
Thus, when both control inputs are enabled all other data sources to the two  
sets of bus lines (16 in all) will remain at their last states.  
OCTAL BUS TRANSCEIVER  
WITH 3-STATE OUTPUT  
LOW POWER SCHOTTKY  
J SUFFIX  
CERAMIC  
CASE 732-03  
20  
1
CONNECTION DIAGRAM (TOP VIEW)  
ENABLE  
GBA  
N SUFFIX  
PLASTIC  
CASE 738-03  
V
B1  
18  
B2  
17  
B3  
16  
B4  
15  
B5  
14  
B6  
13  
B7  
12  
B8  
11  
CC  
20  
19  
20  
1
DW SUFFIX  
SOIC  
CASE 751D-03  
20  
1
1
2
3
4
5
6
8
9
10  
7
ENABLE A1  
GAB  
A2  
A3  
A4  
A5  
A6  
A7  
A8 GND  
ORDERING INFORMATION  
BLOCK DIAGRAM  
1/4 LS623  
SN54LSXXXJ  
Ceramic  
SN74LSXXXN Plastic  
SN74LSXXXDW SOIC  
GBA  
GAB  
A1  
B1  
FUNCTION TABLE  
ENABLE INPUTS  
OPERATION  
LS623  
A2  
B2  
GBA  
L
GAB  
L
H
L
B data to A bus  
A data to B bus  
Isolation  
H
TO OTHER SIX  
TRANSCEIVERS  
H
B data to A bus,  
A data to B bus  
L
H
H = HIGH Level, L = LOW Level, X = Irrelevant  
FAST AND LS TTL DATA  
5-1  

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