Datasheet > SN74LS374N-00

SN74LS374N-00

更新时间： 2024-11-21 15:52:19

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SN74LS374N-00 数据手册

SN54LS373, SN54LS374, SN54S373, SN54S374,

SN74LS373, SN74LS374, SN74S373, SN74S374

OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

SDLS165B – OCTOBER 1975 – REVISED AUGUST 2002

SN54LS373, SN54LS374, SN54S373,

SN54S374 . . . J OR W PACKAGE

SN74LS373, SN74S374 . . . DW, N, OR NS PACKAGE

Choice of Eight Latches or Eight D-Type

Flip-Flops in a Single Package

3-State Bus-Driving Outputs

Full Parallel Access for Loading

Buffered Control Inputs

SN74LS374 . . . DB, DW, N, OR NS PACKAGE

SN74S373 . . . DW OR N PACKAGE

(TOP VIEW)

Clock-Enable Input Has Hysteresis to

Improve Noise Rejection (’S373 and ’S374)

P-N-P Inputs Reduce DC Loading on Data

Lines (’S373 and ’S374)

description

These 8-bit registers feature 3-state outputs

designed specifically for driving highly capacitive

or relatively low-impedance loads. The

†

GND

high-impedance

3-state

and

increased

†

Cfor’LS373and’S373;CLKfor’LS374and’S374.

high-logic-level drive provide these registers with

the capability of being connected directly to and

driving the bus lines in a bus-organized system

without need for interface or pullup components.

These devices are particularly attractive for

implementing buffer registers, I/O ports,

bidirectional bus drivers, and working registers.

SN54LS373, SN54LS374, SN54S373,

SN54S374 . . . FK PACKAGE

(TOP VIEW)

20 19

The eight latches of the ’LS373 and ’S373 are

transparent D-type latches, meaning that while

the enable (C or CLK) input is high, the Q outputs

follow the data (D) inputs. When C or CLK is taken

low, the output is latched at the level of the data

that was set up.

9 10 11 12 13

The eight flip-flops of the ’LS374 and ’S374 are

edge-triggered D-type flip-flops. On the positive

transition of the clock, the Q outputs are set to the

logic states that were set up at the D inputs.

†

Cfor’LS373and’S373;CLKfor’LS374and’S374.

Schmitt-trigger buffered inputs at the enable/clock lines of the ’S373 and ’S374 devices simplify system design

as ac and dc noise rejection is improved by typically 400 mV due to the input hysteresis. A buffered

output-control (OC) input can be used to place the eight outputs in either a normal logic state (high or low logic

levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines

significantly.

OC does not affect the internal operation of the latches or flip-flops. That is, the old data can be retained or new

data can be entered, even while the outputs are off.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

On products compliant to MIL-PRF-38535, all parameters are tested

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

unless otherwise noted. On all other products, production

testing of all parameters.

processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...30

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与SN74LS374N-00相关器件

型号	品牌	获取价格	描述	数据表
SN74LS374N1	ROCHESTER	获取价格	Bus Driver,
SN74LS374N-10	TI	获取价格	IC LS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20, Bus Driver/Transceiver
SN74LS374N3	TI	获取价格	OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS
SN74LS374ND	MOTOROLA	获取价格	LS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20, 738-03
SN74LS374NDS	MOTOROLA	获取价格	LS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20, PLASTIC, DIP-20
SN74LS374NE4	TI	获取价格	OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS
SN74LS374NP3	ROCHESTER	获取价格	Bus Driver,
SN74LS374NS	MOTOROLA	获取价格	LS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20, PLASTIC, DIP-20
SN74LS374NSR	TI	获取价格	OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS
SN74LS374NSRE4	TI	获取价格	OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

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