SN74LS373JDS

更新时间： 2024-01-24 09:21:09

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		总线驱动器总线收发器触发器锁存器逻辑集成电路光电二极管输出元件
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SN74LS373JDS 数据手册

SN54/74LS373

SN54/74LS374

OCTAL TRANSPARENT LATCH

WITH 3-STATE OUTPUTS;

OCTAL D-TYPE FLIP-FLOP

WITH 3-STATE OUTPUT

OCTAL TRANSPARENT LATCH

WITH 3-STATE OUTPUTS;

OCTAL D-TYPE FLIP-FLOP

WITH 3-STATE OUTPUT

The SN54/74LS373 consists of eight latches with 3-state outputs for bus

organized system applications. The flip-flops appear transparent to the data

(data changes asynchronously) when Latch Enable (LE) is HIGH. When LE is

LOW, the data that meets the setup times is latched. Data appears on the bus

when the Output Enable (OE) is LOW. When OE is HIGH the bus output is in

the high impedance state.

LOW POWER SCHOTTKY

The SN54/74LS374 is a high-speed, low-power Octal D-type Flip-Flop fea-

turing separate D-type inputs for each flip-flop and 3-state outputs for bus ori-

entedapplications. Abuffered Clock (CP) and Output Enable (OE) is common

to all flip-flops. The SN54/74LS374 is manufactured using advanced Low

Power Schottky technology and is compatible with all Motorola TTL families.

J SUFFIX

CERAMIC

CASE 732-03

• Eight Latches in a Single Package

• 3-State Outputs for Bus Interfacing

• Hysteresis on Latch Enable

• Edge-Triggered D-Type Inputs

• Buffered Positive Edge-Triggered Clock

• Hysteresis on Clock Input to Improve Noise Margin

• Input Clamp Diodes Limit High Speed Termination Effects

N SUFFIX

PLASTIC

CASE 738-03

DW SUFFIX

SOIC

CASE 751D-03

PIN NAMES

LOADING (Note a)

HIGH

LOW

D –D

Data Inputs

0.5 U.L.

0.25 U.L.

Latch Enable (Active HIGH) Input

Clock (Active HIGH going edge) Input

Output Enable (Active LOW) Input

Outputs (Note b)

O –O

0.5 U.L.

0.25 U.L.

ORDERING INFORMATION

65 (25) U.L.

15 (7.5) U.L.

SN54LSXXXJ

Ceramic

SN74LSXXXN Plastic

SN74LSXXXDW SOIC

NOTES:

a) 1 TTL Units Load (U.L.) = 40 µA HIGH/1.6 mA LOW.

b) The Output LOW drive factor is 7.5 U.L. for Military (54) and 25 U.L. for Commercial

(74) Temperature Ranges. The Output HIGH drive factor is 25 U.L. for Military (54) and

65 U.L. for Commercial (74) Temperature Ranges.

CONNECTION DIAGRAM DIP (TOP VIEW)

SN54/74LS374

SN54/74LS373

NOTE:

The Flatpak version

has the same pinouts

(Connection Diagram) as

the Dual In-Line Package.

FAST AND LS TTL DATA

5-521

12 3 4 5 6 7

中文翻译

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与SN74LS373JDS相关器件

型号	品牌	获取价格	描述	数据表
SN74LS373JS	MOTOROLA	获取价格	LS SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDIP20, CERAMIC, DIP-20
SN74LS373M	ONSEMI	获取价格	Octal Transparent Latch with 3-State Outputs Octal D-Type Flip-Flop with 3-State Output
SN74LS373MEL	ONSEMI	获取价格	Octal Transparent Latch with 3-State Outputs Octal D-Type Flip-Flop with 3-State Output
SN74LS373MR1	ONSEMI	获取价格	LS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, EIAJ, SOIC-20
SN74LS373N	MOTOROLA	获取价格	OCTAL TRANSPARENT LATCH WITH 3-STATE OUTPUTS; OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUT
SN74LS373N	ONSEMI	获取价格	LOW POWER SCHOTTKY
SN74LS373N	TI	获取价格	OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS
SN74LS373N-00	TI	获取价格	LS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20
SN74LS373N1	TI	获取价格	IC,LATCH,SINGLE,8-BIT,LS-TTL,DIP,20PIN,PLASTIC
SN74LS373N-10	TI	获取价格	LS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20

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