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SN74LS373MR1 PDF预览

SN74LS373MR1

更新时间: 2024-01-24 21:01:19
品牌 Logo 应用领域
安森美 - ONSEMI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
8页 154K
描述
LS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, EIAJ, SOIC-20

SN74LS373MR1 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP,
针数:20Reach Compliance Code:compliant
风险等级:5.24系列:LS
JESD-30 代码:R-PDSO-G20JESD-609代码:e4
长度:12.575 mm逻辑集成电路类型:BUS DRIVER
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
传播延迟(tpd):30 ns认证状态:Not Qualified
座面最大高度:2.05 mm最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:COMMERCIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:5.275 mm
Base Number Matches:1

SN74LS373MR1 数据手册

 浏览型号SN74LS373MR1的Datasheet PDF文件第2页浏览型号SN74LS373MR1的Datasheet PDF文件第3页浏览型号SN74LS373MR1的Datasheet PDF文件第4页浏览型号SN74LS373MR1的Datasheet PDF文件第5页浏览型号SN74LS373MR1的Datasheet PDF文件第6页浏览型号SN74LS373MR1的Datasheet PDF文件第7页 
http://onsemi.com  
The SN74LS373 consists of eight latches with 3-state outputs for  
bus organized system applications. The flip-flops appear transparent  
to the data (data changes asynchronously) when Latch Enable (LE) is  
HIGH. When LE is LOW, the data that meets the setup times is  
latched. Data appears on the bus when the Output Enable (OE) is  
LOW. When OE is HIGH the bus output is in the high impedance state.  
The SN74LS374 is a high-speed, low-power Octal D-type Flip-Flop  
featuring separate D-type inputs for each flip-flop and 3-state outputs  
for bus oriented applications. A buffered Clock (CP) and Output  
Enable (OE) is common to all flip-flops. The SN74LS374 is  
manufactured using advanced Low Power Schottky technology and is  
compatible with all ON Semiconductor TTL families.  
LOW  
POWER  
SCHOTTKY  
20  
Eight Latches in a Single Package  
3-State Outputs for Bus Interfacing  
Hysteresis on Latch Enable  
Edge-Triggered D-Type Inputs  
1
PLASTIC  
N SUFFIX  
CASE 738  
Buffered Positive Edge-Triggered Clock  
Hysteresis on Clock Input to Improve Noise Margin  
Input Clamp Diodes Limit High Speed Termination Effects  
GUARANTEED OPERATING RANGES  
20  
Symbol  
Parameter  
Supply Voltage  
Min  
4.75  
0
Typ  
5.0  
25  
Max  
5.25  
70  
Unit  
V
1
V
CC  
SOIC  
DW SUFFIX  
CASE 751D  
T
A
Operating Ambient  
Temperature Range  
°C  
I
Output Current – High  
Output Current – Low  
2.6  
24  
mA  
mA  
OH  
I
OL  
ORDERING INFORMATION  
Device  
Package  
16 Pin DIP  
16 Pin  
Shipping  
SN74LS373N  
SN74LS373DW  
SN74LS374N  
SN74LS374DW  
1440 Units/Box  
2500/Tape & Reel  
1440 Units/Box  
16 Pin DIP  
16 Pin  
2500/Tape & Reel  
Semiconductor Components Industries, LLC, 1999  
1
Publication Order Number:  
December, 1999 – Rev. 6  
SN74LS373/D  

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