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SN74LS192ND PDF预览

SN74LS192ND

更新时间: 2024-11-23 13:13:51
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 计数器
页数 文件大小 规格书
9页 278K
描述
Decade Counter, LS Series, Synchronous, Positive Edge Triggered, 4-Bit, Bidirectional, TTL, PDIP16, PLASTIC, DIP-16

SN74LS192ND 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP16,.3Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.68
其他特性:TCO UP AND TCO DOWN OUTPUTS; SEPARATE UP/DOWN CLOCK计数方向:BIDIRECTIONAL
系列:LSJESD-30 代码:R-PDIP-T16
JESD-609代码:e0长度:19.175 mm
负载电容(CL):15 pF负载/预设输入:YES
逻辑集成电路类型:DECADE COUNTER最大频率@ Nom-Sup:25000000 Hz
最大I(ol):0.008 A工作模式:SYNCHRONOUS
位数:4功能数量:1
端子数量:16最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):34 mA传播延迟(tpd):47 ns
认证状态:Not Qualified座面最大高度:4.44 mm
子类别:Counters最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.62 mm
最小 fmax:25 MHzBase Number Matches:1

SN74LS192ND 数据手册

 浏览型号SN74LS192ND的Datasheet PDF文件第2页浏览型号SN74LS192ND的Datasheet PDF文件第3页浏览型号SN74LS192ND的Datasheet PDF文件第4页浏览型号SN74LS192ND的Datasheet PDF文件第5页浏览型号SN74LS192ND的Datasheet PDF文件第6页浏览型号SN74LS192ND的Datasheet PDF文件第7页 
SN54/74LS192  
SN54/74LS193  
PRESETTABLE BCD/DECADE  
UP/DOWN COUNTER  
PRESETTABLE 4-BIT BINARY  
UP/DOWN COUNTER  
PRESETTABLE BCD/DECADE  
UP/DOWN COUNTER  
PRESETTABLE 4-BIT BINARY  
UP/DOWN COUNTER  
The SN54/74LS192 is an UP/DOWN BCD Decade (8421) Counter and the  
SN54/74LS193 is an UP/DOWN MODULO-16 Binary Counter. Separate  
Count Up and Count Down Clocks are used and in either counting mode the  
circuits operate synchronously. The outputs change state synchronous with  
the LOW-to-HIGH transitions on the clock inputs.  
LOW POWER SCHOTTKY  
Separate Terminal Count Up and Terminal Count Down outputs are  
provided which are used as the clocks for a subsequent stages without extra  
logic, thus simplifying multistage counter designs. Individual preset inputs  
allow the circuits to be used as programmable counters. Both the Parallel  
Load (PL) and the Master Reset (MR) inputs asynchronously override the  
clocks.  
J SUFFIX  
CERAMIC  
CASE 620-09  
16  
1
Low Power . . . 95 mW Typical Dissipation  
High Speed . . . 40 MHz Typical Count Frequency  
Synchronous Counting  
Asynchronous Master Reset and Parallel Load  
Individual Preset Inputs  
N SUFFIX  
PLASTIC  
CASE 648-08  
16  
1
Cascading Circuitry Internally Provided  
Input Clamp Diodes Limit High Speed Termination Effects  
D SUFFIX  
SOIC  
CASE 751B-03  
CONNECTION DIAGRAM DIP (TOP VIEW)  
16  
1
ORDERING INFORMATION  
NOTE:  
SN54LSXXXJ  
SN74LSXXXN Plastic  
SN74LSXXXD SOIC  
Ceramic  
The Flatpak version  
has the same pinouts  
(Connection Diagram) as  
the Dual In-Line Package.  
LOGIC SYMBOL  
PIN NAMES  
LOADING (Note a)  
HIGH  
LOW  
CP  
CP  
MR  
PL  
Count Up Clock Pulse Input  
Count Down Clock Pulse Input  
Asynchronous Master Reset (Clear) Input  
Asynchronous Parallel Load (Active LOW) Input  
Parallel Data Inputs  
Flip-Flop Outputs (Note b)  
Terminal Count Down (Borrow) Output (Note b)  
Terminal Count Up (Carry) Output (Note b)  
0.5 U.L.  
0.5 U.L.  
0.5 U.L.  
0.5 U.L.  
0.5 U.L.  
10 U.L. 5 (2.5) U.L.  
10 U.L. 5 (2.5) U.L.  
10 U.L. 5 (2.5) U.L.  
0.25 U.L.  
0.25 U.L.  
0.25 U.L.  
0.25 U.L.  
0.25 U.L.  
U
D
P
Q
TC  
TC  
n
n
D
U
NOTES:  
a. 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.  
b. The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)  
b. Temperature Ranges.  
FAST AND LS TTL DATA  
5-351  

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IC,COUNTER,UP/DOWN,4-BIT BINARY,LS-TTL,SOP,16PIN,PLASTIC