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SN74LS191N PDF预览

SN74LS191N

更新时间: 2024-11-18 23:06:19
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 计数器逻辑集成电路光电二极管
页数 文件大小 规格书
10页 311K
描述
PRESETTABLE BCD/DECADE UP/DOWN COUNTERS PRESETTABLE 4-BIT BINARY UP/DOWN COUNTERS

SN74LS191N 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP,
针数:16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.19
Is Samacsys:N其他特性:TCO OUTPUT
计数方向:BIDIRECTIONAL系列:LS
JESD-30 代码:R-PDIP-T16JESD-609代码:e0
长度:19.175 mm负载电容(CL):15 pF
负载/预设输入:YES逻辑集成电路类型:BINARY COUNTER
工作模式:SYNCHRONOUS位数:4
功能数量:1端子数量:16
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED最大电源电流(ICC):35 mA
传播延迟(tpd):36 ns认证状态:Not Qualified
座面最大高度:4.44 mm最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.62 mm
最小 fmax:20 MHzBase Number Matches:1

SN74LS191N 数据手册

 浏览型号SN74LS191N的Datasheet PDF文件第2页浏览型号SN74LS191N的Datasheet PDF文件第3页浏览型号SN74LS191N的Datasheet PDF文件第4页浏览型号SN74LS191N的Datasheet PDF文件第5页浏览型号SN74LS191N的Datasheet PDF文件第6页浏览型号SN74LS191N的Datasheet PDF文件第7页 
SN54/74LS190  
SN54/74LS191  
PRESETTABLE BCD/DECADE  
UP/DOWN COUNTERS  
PRESETTABLE 4-BIT BINARY  
UP/DOWN COUNTERS  
PRESETTABLE BCD/DECADE  
UP/DOWN COUNTERS  
PRESETTABLE 4-BIT BINARY  
UP/DOWN COUNTERS  
The SN54/74LS190 is a synchronous UP/DOWN BCD Decade (8421)  
Counter and the SN54/74LS191 is a synchronous UP/DOWN Modulo-16  
Binary Counter. State changes of the counters are synchronous with the  
LOW-to-HIGH transition of the Clock Pulse input.  
LOW POWER SCHOTTKY  
An asynchronous Parallel Load (PL) input overrides counting and loads the  
data present on the P inputs into the flip-flops, which makes it possible to use  
n
the circuits as programmable counters. A Count Enable (CE) input serves as  
the carry/borrow input in multi-stage counters. An Up/Down Count Control  
(U/D) input determines whether a circuit counts up or down. A Terminal Count  
(TC) output and a Ripple Clock (RC) output provide overflow/underflow  
indication and make possible a variety of methods for generating  
carry/borrow signals in multistage counter applications.  
J SUFFIX  
CERAMIC  
CASE 620-09  
16  
1
Low Power . . . 90 mW Typical Dissipation  
High Speed . . . 25 MHz Typical Count Frequency  
Synchronous Counting  
N SUFFIX  
PLASTIC  
Asynchronous Parallel Load  
Individual Preset Inputs  
CASE 648-08  
16  
1
Count Enable and Up/Down Control Inputs  
Cascadable  
Input Clamp Diodes Limit High Speed Termination Effects  
D SUFFIX  
SOIC  
CASE 751B-03  
16  
1
CONNECTION DIAGRAM DIP (TOP VIEW)  
ORDERING INFORMATION  
SN54LSXXXJ  
SN74LSXXXN Plastic  
SN74LSXXXD SOIC  
Ceramic  
NOTE:  
The Flatpak version  
has the same pinouts  
(Connection Diagram) as  
the Dual In-Line Package.  
LOGIC SYMBOL  
PIN NAMES  
LOADING (Note a)  
HIGH  
LOW  
CE  
CP  
U/D  
PL  
Count Enable (Active LOW) Input  
1.5 U.L.  
0.5 U.L.  
0.5 U.L.  
0.5 U.L.  
0.5 U.L.  
10 U.L.  
10 U.L.  
10 U.L.  
0.7 U.L.  
0.25 U.L.  
0.25 U.L.  
0.25 U.L.  
0.25 U.L.  
5 (2.5) U.L.  
5 (2.5) U.L.  
5 (2.5) U.L.  
Clock Pulse (Active HIGH going edge) Input  
Up/Down Count Control Input  
Parallel Load Control (Active LOW) Input  
Parallel Data Inputs  
Flip-Flop Outputs (Note b)  
Ripple Clock Output (Note b)  
Terminal Count Output (Note b)  
P
Q
RC  
n
n
TC  
NOTES:  
a. 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.  
b. The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)  
b. Temperature Ranges.  
FAST AND LS TTL DATA  
5-341  

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