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SN74HCT540N3 PDF预览

SN74HCT540N3

更新时间： 2024-11-20 20:58:15
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
6页 91K
描述
Octal Buffers And Line Drivers With 3-State Outputs 20-PDIP -40 to 85

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SN74HCT540N3 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：DIP
包装说明：DIP, DIP20,.3针数：20
Reach Compliance Code：not_compliantHTS代码：8542.39.00.01
风险等级：5.2其他特性：WITH DUAL OUTPUT ENABLE
控制类型：ENABLE LOW系列：HCT
JESD-30 代码：R-PDIP-T20长度：25.4 mm
逻辑集成电路类型：BUS DRIVER最大I（ol）：0.006 A
位数：8功能数量：1
端口数量：2端子数量：20
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：INVERTED
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装等效代码：DIP20,.3封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：NOT SPECIFIED
电源：5 V传播延迟（tpd）：38 ns
认证状态：Not Qualified座面最大高度：5.08 mm
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：NO技术：CMOS
温度等级：INDUSTRIAL端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.62 mm
Base Number Matches：1

SN74HCT540N3 数据手册

 浏览型号SN74HCT540N3的Datasheet PDF文件第2页浏览型号SN74HCT540N3的Datasheet PDF文件第3页浏览型号SN74HCT540N3的Datasheet PDF文件第4页浏览型号SN74HCT540N3的Datasheet PDF文件第5页浏览型号SN74HCT540N3的Datasheet PDF文件第6页 
SN54HCT540, SN74HCT540  
OCTAL BUFFERS AND LINE DRIVERS  
WITH 3-STATE OUTPUTS  
SCLS008B – MARCH 1984 – REVISED MAY 1997  
SN54HCT540 . . . J OR W PACKAGE  
SN74HCT540 . . . DW OR N PACKAGE  
(TOP VIEW)  
Inputs Are TTL-Voltage Compatible  
High-Current 3-State Outputs Interface  
Directly With System Bus or Can Drive up  
to 15 LSTTL Loads  
OE1  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
V
CC  
OE2  
Y1  
1
2
3
4
5
6
7
8
9
20  
19  
18  
Data Flow-Through Pinout (All Inputs on  
Opposite Side From Outputs)  
17 Y2  
16 Y3  
15 Y4  
14 Y5  
13 Y6  
12 Y7  
11 Y8  
Package Options Include Plastic  
Small-Outline (DW) and Ceramic Flat (W)  
Packages, Ceramic Chip Carriers (FK), and  
Standard Plastic (N) and Ceramic (J)  
300-mil DIPs  
description  
GND 10  
These octal buffers and line drivers are designed  
to have the performance of the ’HCT240 and a  
pinout with inputs and outputs on opposite sides  
of the package. This arrangement greatly  
facilitates printed circuit board layout.  
SN54HCT540 . . . FK PACKAGE  
(TOP VIEW)  
3
2
1
20 19  
18  
The 3-state control gate is a 2-input NOR. If either  
output-enable (OE1 or OE2) input is high, all eight  
outputs are in the high-impedance state. The  
’HCT540 provide inverted data at the outputs.  
Y1  
Y2  
Y3  
A3  
A4  
A5  
A6  
A7  
4
5
6
7
8
17  
16  
15 Y4  
14  
9 10 11 12 13  
Y5  
The SN54HCT540 is characterized for operation  
over the full military temperature range of –55°C  
to 125°C. The SN74HCT540 is characterized for  
operation from –40°C to 85°C.  
FUNCTION TABLE  
(each buffer/driver)  
INPUTS  
OUTPUT  
Y
OE1  
L
OE2  
L
A
L
H
L
L
L
H
X
X
H
X
Z
Z
X
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1997, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
123456

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