5秒后页面跳转
SN74HCS137D PDF预览

SN74HCS137D

更新时间: 2024-11-19 02:51:35
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
19页 689K
描述
SN74HCS137 3- to 8-Line Decoder/Demultiplexer with Address Latches and Schmitt-Trigger Inputs

SN74HCS137D 数据手册

 浏览型号SN74HCS137D的Datasheet PDF文件第2页浏览型号SN74HCS137D的Datasheet PDF文件第3页浏览型号SN74HCS137D的Datasheet PDF文件第4页浏览型号SN74HCS137D的Datasheet PDF文件第5页浏览型号SN74HCS137D的Datasheet PDF文件第6页浏览型号SN74HCS137D的Datasheet PDF文件第7页 
SN74HCS137
SCLS831 – SEPTEMBER 2020  
SN74HCS137 3- to 8-Line Decoder/Demultiplexer with Address Latches and Schmitt-  
Trigger Inputs  
1 Features  
3 Description  
Wide operating voltage range: 2 V to 6 V  
Schmitt-trigger inputs allow for slow or noisy input  
signals  
Low power consumption  
– Typical ICC of 100 nA  
– Typical input leakage current of ±100 nA  
±7.8-mA output drive at 6 V  
Extended ambient temperature range: –40°C to  
+125°C, TA  
The SN74HCS137 is a three to eight decoder with  
latched address inputs, one standard output strobe  
(G0), and one active low output strobe (G1). When the  
latch enable (LE) input is high, the device acts as a  
standard three to eight decoder. When the latch  
enable (LE) input is low, the address latch retains its  
previous state. When the outputs are gated by either  
strobe input, they are all forced into the high state.  
When the outputs are not disabled by one or both of  
the strobe inputs, only the selected output is low while  
all others are high.  
2 Applications  
Memory device selection with shared data bus  
Reduce required number of outputs for chip select  
applications  
Device Information  
PART NUMBER  
SN74HCS137PW  
SN74HCS137D  
PACKAGE(1)  
TSSOP (16)  
SOIC (16)  
BODY SIZE (NOM)  
5.00 mm × 4.40 mm  
9.90 mm × 3.90 mm  
Route data  
(1) For all available packages, see the orderable addendum at  
the end of the data sheet.  
Supports Slow Inputs  
Low Power  
Noise Rejection  
Input Voltage  
Waveforms  
Time  
Input Voltage  
Time  
Standard  
CMOS Input  
Response  
Waveforms  
Time  
Time  
Input Voltage  
Schmitt-trigger  
CMOS Input  
Response  
Waveforms  
Time  
Time  
Input Voltage  
Benefits of Schmitt-trigger inputs  
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
 

与SN74HCS137D相关器件

型号 品牌 获取价格 描述 数据表
SN74HCS137D-Q1 TI

获取价格

SN74HCS137-Q1 Automotive Qualified 3- to 8-Line Decoder/Demultiplexer with Address Latches
SN74HCS137DR TI

获取价格

SN74HCS137 3- to 8-Line Decoder/Demultiplexer with Address Latches and Schmitt-Trigger Inp
SN74HCS137PW TI

获取价格

SN74HCS137 3- to 8-Line Decoder/Demultiplexer with Address Latches and Schmitt-Trigger Inp
SN74HCS137PW-Q1 TI

获取价格

SN74HCS137-Q1 Automotive Qualified 3- to 8-Line Decoder/Demultiplexer with Address Latches
SN74HCS137PWR TI

获取价格

SN74HCS137 3- to 8-Line Decoder/Demultiplexer with Address Latches and Schmitt-Trigger Inp
SN74HCS137-Q1 TI

获取价格

SN74HCS137-Q1 Automotive Qualified 3- to 8-Line Decoder/Demultiplexer with Address Latches
SN74HCS137-Q1_V01 TI

获取价格

SN74HCS137-Q1 Automotive Qualified 3- to 8-Line Decoder/Demultiplexer with Address Latches
SN74HCS137QDRQ1 TI

获取价格

SN74HCS137-Q1 Automotive Qualified 3- to 8-Line Decoder/Demultiplexer with Address Latches
SN74HCS137QPWRQ1 TI

获取价格

SN74HCS137-Q1 Automotive Qualified 3- to 8-Line Decoder/Demultiplexer with Address Latches
SN74HCS138 TI

获取价格

SN74HCS138 3- to 8-Line Decoder/Demultiplexer with Schmitt-Trigger Inputs