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SN74HCS05DR PDF预览

SN74HCS05DR

更新时间: 2024-11-30 11:10:51
品牌 Logo 应用领域
德州仪器 - TI 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
21页 853K
描述
具有漏极开路输出的六路反相器 | D | 14 | -40 to 125

SN74HCS05DR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:SOP, SOP14,.25
Reach Compliance Code:compliant风险等级:1.74
Samacsys Description:Inverters Hex inverters with open-drain outputs 14-SOIC -40 to 125系列:HC/UH
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:8.65 mm负载电容(CL):50 pF
逻辑集成电路类型:INVERTER最大I(ol):0.0078 A
湿度敏感等级:1功能数量:6
输入次数:1端子数量:14
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:OPEN-DRAIN封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TR最大电源电流(ICC):0.002 mA
Prop。Delay @ Nom-Sup:15 ns传播延迟(tpd):39 ns
施密特触发器:YES座面最大高度:1.75 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:3.9 mmBase Number Matches:1

SN74HCS05DR 数据手册

 浏览型号SN74HCS05DR的Datasheet PDF文件第2页浏览型号SN74HCS05DR的Datasheet PDF文件第3页浏览型号SN74HCS05DR的Datasheet PDF文件第4页浏览型号SN74HCS05DR的Datasheet PDF文件第5页浏览型号SN74HCS05DR的Datasheet PDF文件第6页浏览型号SN74HCS05DR的Datasheet PDF文件第7页 
SN74HCS05  
SCLS797A – JUNE 2020 – REVISED OCTOBER 2020  
SN74HCS05 Hex Inverter with Open-Drain Outputs and Schmitt-Trigger Inputs  
1 Features  
2 Applications  
Wide operating voltage range: 2 V to 6 V  
Schmitt-trigger inputs allow for slow or noisy input  
signals  
Drive indicator LEDs  
Level-shift using open-drain outputs  
Invert a digital signal  
Low power consumption  
– Typical ICC of 100 nA  
3 Description  
This device contains six independent inverter with  
open-drain outputs and Schmitt-trigger inputs. Each  
gate performs the Boolean function Y = A in positive  
logic.  
– Typical input leakage current of ±100 nA  
±7.8-mA output drive at 5 V  
Extended ambient temperature range: –40°C to  
+125°C, TA  
Device Information (1)  
PART NUMBER  
SN74HCS05PWR  
SN74HCS05DR  
PACKAGE  
TSSOP (14)  
SOIC (14)  
BODY SIZE (NOM)  
5.00 mm × 4.40 mm  
8.70 mm × 3.90 mm  
(1) For all available packages, see the orderable addendum at  
the end of the data sheet.  
Supports Slow Inputs  
Low Power  
Noise Rejection  
Input Voltage  
Waveforms  
Time  
Input Voltage  
Time  
Standard  
CMOS Input  
Response  
Waveforms  
Time  
Time  
Input Voltage  
Schmitt-trigger  
CMOS Input  
Response  
Waveforms  
Time  
Time  
Input Voltage  
Benefits of Schmitt-trigger Inputs  
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
 

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