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SN74HC148NE4 PDF预览

SN74HC148NE4

更新时间: 2024-11-24 05:17:31
品牌 Logo 应用领域
德州仪器 - TI 编码器
页数 文件大小 规格书
17页 585K
描述
8-LINE TO 3-LINE PRIORITY ENCODERS

SN74HC148NE4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP16,.3针数:16
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.47其他特性:8 TO 3 LINE PRIORITY ENCODER; CASCADABLE; WITH GROUP SELECT OUTPUT
系列:HC/UHJESD-30 代码:R-PDIP-T16
JESD-609代码:e4长度:19.305 mm
逻辑集成电路类型:ENCODER位数:8
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/6 V
传播延迟(tpd):240 ns认证状态:Not Qualified
座面最大高度:5.08 mm子类别:Arithmetic Circuits
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm

SN74HC148NE4 数据手册

 浏览型号SN74HC148NE4的Datasheet PDF文件第2页浏览型号SN74HC148NE4的Datasheet PDF文件第3页浏览型号SN74HC148NE4的Datasheet PDF文件第4页浏览型号SN74HC148NE4的Datasheet PDF文件第5页浏览型号SN74HC148NE4的Datasheet PDF文件第6页浏览型号SN74HC148NE4的Datasheet PDF文件第7页 
ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢃꢇ ꢈ ꢀꢁꢉ ꢃꢄ ꢅꢆ ꢃꢇ  
ꢇ ꢊꢋ ꢌꢁꢍ ꢎ ꢏ ꢐ ꢊꢋ ꢌꢁꢍ ꢑꢒ ꢌꢏ ꢒꢌꢎ ꢓ ꢍꢁꢅ ꢏ ꢔꢍ ꢒ ꢀ  
SCLS109G − MARCH 1984 − REVISED APRIL 2004  
SN54HC148 . . . J OR W PACKAGE  
SN74HC148 . . . D, DW, N, OR NS PACKAGE  
(TOP VIEW)  
D
D
D
D
D
D
D
Wide Operating Voltage Range of 2 V to 6 V  
Outputs Can Drive Up To 10 LSTTL Loads  
Low Power Consumption, 80-µA Max I  
CC  
4
5
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
Typical t = 16 ns  
pd  
4-mA Output Drive at 5 V  
EO  
GS  
3
6
Low Input Current of 1 µA Max  
Encode Eight Data Lines to 3-Line Binary  
(Octal)  
7
EI  
2
A2  
A1  
GND  
1
D
Applications Include:  
− n-Bit Encoding  
− Code Converters and Generators  
0
A0  
SN54HC148 . . . FK PACKAGE  
(TOP VIEW)  
description/ordering information  
The ’HC148 devices feature priority decoding of  
the inputs to ensure that only the highest-order  
data line is encoded. These devices encode eight  
data lines to 3-line (4-2-1) binary (octal).  
Cascading circuitry (enable input EI and enable  
output EO) has been provided to allow octal  
expansion without the need for external circuitry.  
Data inputs and outputs are active at the low logic  
level.  
3
2
1
20 19  
18  
GS  
3
6
7
4
5
6
7
8
17  
16  
15  
14  
NC  
2
NC  
EI  
1
A2  
9 10 11 12 13  
NC − No internal connection  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
SOIC − D  
Tube of 25  
Tube of 40  
Reel of 2500  
Reel of 250  
Reel of 2000  
Reel of 2000  
Tube of 25  
Tube of 150  
Tube of 55  
SN74HC148N  
SN74HC148N  
SN74HC148D  
SN74HC148DR  
SN74HC148DT  
SN74HC148DWR  
SN74HC148NSR  
SNJ54HC148J  
SNJ54HC148W  
SNJ54HC148FK  
HC148  
−40°C to 85°C  
SOIC − DW  
SOP − NS  
CDIP − J  
HC148  
HC148  
SNJ54HC148J  
SNJ54HC148W  
SNJ54HC148FK  
−55°C to 125°C  
CFP − W  
LCCC − FK  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2004, Texas Instruments Incorporated  
ꢏ ꢘ ꢣ ꢛ ꢚꢦ ꢡꢠ ꢞꢟ ꢠꢚ ꢜꢣ ꢥꢗ ꢝꢘ ꢞ ꢞꢚ ꢭꢌ ꢋꢊ ꢑꢒ ꢮ ꢊꢐꢇꢂ ꢐꢂꢈ ꢝꢥꢥ ꢣꢝ ꢛ ꢝ ꢜꢢ ꢞꢢꢛ ꢟ ꢝ ꢛ ꢢ ꢞꢢ ꢟꢞꢢ ꢦ  
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢧ  
ꢡ ꢘꢥ ꢢꢟꢟ ꢚ ꢞꢨꢢ ꢛ ꢪꢗ ꢟꢢ ꢘ ꢚꢞꢢ ꢦꢧ ꢏ ꢘ ꢝꢥ ꢥ ꢚ ꢞꢨꢢ ꢛ ꢣꢛ ꢚ ꢦꢡꢠ ꢞꢟ ꢈ ꢣꢛ ꢚ ꢦꢡꢠ ꢞꢗꢚ ꢘ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74HC148NE4 替代型号

型号 品牌 替代类型 描述 数据表
SN74HC148N TI

类似代替

8-LINE TO 3-LINE PRIORITY ENCODERS
SN54HC148J TI

类似代替

8-LINE TO 3-LINE PRIORITY ENCODERS

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