是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
Reach Compliance Code: | not_compliant | 风险等级: | 5.67 |
JESD-30 代码: | R-PDIP-T14 | 逻辑集成电路类型: | J-K FLIP-FLOP |
功能数量: | 1 | 端子数量: | 14 |
最高工作温度: | 70 °C | 最低工作温度: | |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | DIP |
封装等效代码: | DIP14,.3 | 封装形状: | RECTANGULAR |
封装形式: | IN-LINE | 认证状态: | Not Qualified |
子类别: | FF/Latches | 表面贴装: | NO |
技术: | TTL | 温度等级: | COMMERCIAL |
端子形式: | THROUGH-HOLE | 端子节距: | 2.54 mm |
端子位置: | DUAL | 触发器类型: | MASTER-SLAVE |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
SN74H72NP3 | TI |
获取价格 |
IC,FLIP-FLOP,SINGLE,J/K TYPE,H-TTL,DIP,14PIN,PLASTIC | |
SN74H73J | TI |
获取价格 |
TTL/H/L SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14, | |
SN74H73J4 | TI |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,H-TTL,DIP,14PIN,CERAMIC | |
SN74H73JP4 | TI |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,H-TTL,DIP,14PIN,CERAMIC | |
SN74H73N | TI |
获取价格 |
TTL/H/L SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14, | |
SN74H73N1 | TI |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,H-TTL,DIP,14PIN,PLASTIC | |
SN74H73N3 | TI |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,H-TTL,DIP,14PIN,PLASTIC | |
SN74H73NP1 | TI |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,H-TTL,DIP,14PIN,PLASTIC | |
SN74H73NP3 | TI |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,H-TTL,DIP,14PIN,PLASTIC | |
SN74H74 | TI |
获取价格 |
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR |