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SN74F283N-10 PDF预览

SN74F283N-10

更新时间: 2024-11-24 14:35:59
品牌 Logo 应用领域
德州仪器 - TI 光电二极管逻辑集成电路
页数 文件大小 规格书
18页 847K
描述
F/FAST SERIES, 4-BIT ADDER/SUBTRACTOR, PDIP16

SN74F283N-10 技术参数

生命周期:Obsolete包装说明:DIP,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.63其他特性:FULL ADDER; WITH INTERNAL CARRY LOOKAHEAD; PERMITS RIPPLE CARRY CASCADING
系列:F/FASTJESD-30 代码:R-PDIP-T16
长度:19.305 mm逻辑集成电路类型:ADDER/SUBTRACTOR
位数:4功能数量:1
端子数量:16最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE传播延迟(tpd):10.5 ns
认证状态:Not Qualified座面最大高度:5.08 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:COMMERCIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL宽度:7.62 mm
Base Number Matches:1

SN74F283N-10 数据手册

 浏览型号SN74F283N-10的Datasheet PDF文件第2页浏览型号SN74F283N-10的Datasheet PDF文件第3页浏览型号SN74F283N-10的Datasheet PDF文件第4页浏览型号SN74F283N-10的Datasheet PDF文件第5页浏览型号SN74F283N-10的Datasheet PDF文件第6页浏览型号SN74F283N-10的Datasheet PDF文件第7页 
ꢀꢁ ꢂꢃ ꢄ ꢅ ꢆ ꢇ ꢈꢉ ꢀ ꢁꢊ ꢃꢄꢅ ꢆꢇ  
ꢃ ꢋꢌꢍ ꢎꢉ ꢌꢍꢁ ꢏꢐꢑꢉꢄ ꢒꢓ ꢓꢉꢏ ꢔꢔ ꢕꢐ ꢀ  
ꢖ ꢍꢎ ꢗꢉ ꢄꢏꢀꢎ ꢉꢘ ꢏ ꢐꢐꢑ  
SDFS069A − D2932, MARCH 1987 − REVISED OCTOBER 1993  
SN54F283 . . . J PACKAGE  
SN74F283 . . . D OR N PACKAGE  
(TOP VIEW)  
Full-Carry Look-Ahead Across the  
Four Bits  
Systems Achieve Partial Look-Ahead  
Performance With the Economy of Ripple  
Carry  
V
Σ2  
B2  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC  
B3  
A3  
Σ3  
A4  
B4  
Σ4  
C4  
Package Options Include Plastic  
Small-Outline Packages, Ceramic Chip  
Carriers, and Standard Plastic and Ceramic  
300-mil DIPs  
A2  
Σ1  
A1  
B1  
C0  
GND  
description  
The F283 is a full adder that performs the addition  
of two 4-bit binary words. The sum (Σ) outputs are  
provided for each bit and the resultant carry (C4)  
output is obtained from the fourth bit.  
SN54F283 . . . FK PACKAGE  
(TOP VIEW)  
The device features full internal look-ahead  
across all four bits generating the carry term C4 in  
typically 5.7 ns. This capability provides the  
system designer with partial look-ahead  
performance at the economy and reduced  
package count of a ripple-carry implementation.  
3
2
1
20 19  
18  
A3  
Σ3  
NC  
A4  
B4  
A2  
Σ1  
NC  
A1  
B1  
4
5
6
7
8
17  
16  
15  
14  
The adder logic, including the carry, is  
implemented in its true form. End-around carry  
can be accomplished without the need for logic or  
level inversion.  
9 10 11 12 13  
NC − No internal connection  
The F283 can be used with either all-active-high  
(positive logic) or all-active-low (negative logic)  
operands.  
The SN54F283 is characterized for operation over  
the full military temperature range of 55°C to  
125°C. The SN74F283 is characterized for  
operation from 0°C to 70°C.  
logic symbol  
Σ
5
A1  
A2  
A3  
A4  
B1  
B2  
B3  
B4  
C0  
0
4
Σ1  
1
Σ2  
13  
Σ3  
10  
Σ4  
3
0
14  
12  
6
P
Σ
3
0
3
2
Q
15  
11  
7
9
CO  
C4  
3
CI  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  
Pin numbers shown are for the D, J, and N packages.  
ꢎꢦ  
Copyright 1993, Texas Instruments Incorporated  
ꢢ ꢦ ꢣ ꢢꢛ ꢜꢰ ꢞꢝ ꢡ ꢩꢩ ꢧꢡ ꢟ ꢡ ꢠ ꢦ ꢢ ꢦ ꢟ ꢣ ꢫ  
2−1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

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