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SN74F244DW-00R PDF预览

SN74F244DW-00R

更新时间: 2024-11-18 15:52:11
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
20页 1077K
描述
F/FAST SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO20

SN74F244DW-00R 技术参数

生命周期:Obsolete包装说明:SOP,
Reach Compliance Code:unknown风险等级:5.13
系列:F/FASTJESD-30 代码:R-PDSO-G20
长度:12.8 mm逻辑集成电路类型:BUS DRIVER
位数:4功能数量:2
端口数量:2端子数量:20
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
传播延迟(tpd):6.5 ns认证状态:Not Qualified
座面最大高度:2.65 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:7.5 mmBase Number Matches:1

SN74F244DW-00R 数据手册

 浏览型号SN74F244DW-00R的Datasheet PDF文件第2页浏览型号SN74F244DW-00R的Datasheet PDF文件第3页浏览型号SN74F244DW-00R的Datasheet PDF文件第4页浏览型号SN74F244DW-00R的Datasheet PDF文件第5页浏览型号SN74F244DW-00R的Datasheet PDF文件第6页浏览型号SN74F244DW-00R的Datasheet PDF文件第7页 
ꢉ ꢊꢋꢌꢍꢇꢎ ꢏꢄ ꢄꢐ ꢑꢀꢒ ꢓꢑ ꢔ ꢕꢐ ꢑ  
ꢖ ꢔꢋ ꢗꢇ ꢘ ꢙꢀꢋꢌꢋ ꢐꢇ ꢉ ꢏꢋ ꢚꢏ ꢋ  
SDFS063A − D2932, MARCH 1987 − REVISED OCTOBER 1993  
SN54F244 . . . J PACKAGE  
SN74F244 . . . DB, DW, OR N PACKAGE  
(TOP VIEW)  
3-State Outputs Drive Bus Lines or Buffer  
Memory Address Registers  
Package Options Include Plastic  
Small-Outline (SOIC) and Shrink  
Small-Outline (SSOP) Packages, Ceramic  
Chip Carriers, and Plastic and Ceramic  
DIPs  
1OE  
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
GND  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
description  
These octal buffers and line drivers are designed  
specifically to improve both the performance and  
density of 3-state memory address drivers, clock  
drivers, and bus-oriented receivers and  
transmitters. Taken together with the F240 and  
F241, these devices provide the choice of  
selected combinations of inverting and  
noninverting outputs, symmetrical OE (active-low  
output-enable) inputs, and complementary OE  
and OE inputs.  
13 2A2  
12 1Y4  
11  
2A1  
SN54F244 . . . FK PACKAGE  
(TOP VIEW)  
3
2
1
20 19  
18  
The F244 is organized as two 4-bit buffers/line  
drivers with separate output enable (OE) inputs.  
When OE is low, the device passes data from the  
A inputs to the Y outputs. When OE is high, the  
outputs are in the high-impedance state.  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
1A2  
2Y3  
1A3  
2Y2  
1A4  
4
5
6
7
8
17  
16  
15  
14  
9 10 11 12 13  
The SN74F244 is available in TI’s shrink  
small-outline package (DB), which provides the  
same I/O pin count and functionality of standard  
small-outline packages in less than half the  
printed-circuit-board area.  
The SN54F244 is characterized for operation over  
the full military temperature range of 55°C to  
125°C. The SN74F244 is characterized for  
operation from 0°C to 70°C.  
FUNCTION TABLE  
(each buffer)  
INPUTS  
OUTPUT  
Y
H
L
OE  
A
H
L
L
L
H
X
Z
ꢋꢦ  
Copyright 1993, Texas Instruments Incorporated  
ꢢ ꢦ ꢣ ꢢꢛ ꢜꢰ ꢞꢝ ꢡ ꢩꢩ ꢧꢡ ꢟ ꢡ ꢠ ꢦ ꢢ ꢦ ꢟ ꢣ ꢫ  
2−1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

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