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SN74AS32NSRG4 PDF预览

SN74AS32NSRG4

更新时间: 2024-11-14 12:15:03
品牌 Logo 应用领域
德州仪器 - TI 输入元件
页数 文件大小 规格书
19页 853K
描述
QUADRUPLE 2-INPUT POSITIVE-OR GATES

SN74AS32NSRG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP14,.3针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.63系列:AS
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:10.2 mm逻辑集成电路类型:OR GATE
最大I(ol):0.02 A湿度敏感等级:1
功能数量:4输入次数:2
端子数量:14最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:5 V最大电源电流(ICC):26.6 mA
Prop。Delay @ Nom-Sup:5.8 ns传播延迟(tpd):5.8 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:2 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.3 mm
Base Number Matches:1

SN74AS32NSRG4 数据手册

 浏览型号SN74AS32NSRG4的Datasheet PDF文件第2页浏览型号SN74AS32NSRG4的Datasheet PDF文件第3页浏览型号SN74AS32NSRG4的Datasheet PDF文件第4页浏览型号SN74AS32NSRG4的Datasheet PDF文件第5页浏览型号SN74AS32NSRG4的Datasheet PDF文件第6页浏览型号SN74AS32NSRG4的Datasheet PDF文件第7页 
SN54ALS32, SN54AS32, SN74ALS32, SN74AS32  
QUADRUPLE 2-INPUT POSITIVE-OR GATES  
SDAS113B – APRIL 1982 – REVISED DECEMBER 1994  
SN54ALS32, SN54AS32 . . . J PACKAGE  
SN74ALS32, SN74AS32 . . . D OR N PACKAGE  
(TOP VIEW)  
Package Options Include Plastic  
Small-Outline (D) Packages, Ceramic Chip  
Carriers (FK), and Standard Plastic (N) and  
Ceramic (J) 300-mil DIPs  
1A  
1B  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
4B  
4A  
4Y  
3B  
3A  
3Y  
description  
1Y  
2A  
These devices contain four independent 2-input  
positive-OR gates. They perform the Boolean  
functions Y = A B or Y = A + B in positive logic.  
2B  
2Y  
GND  
8
The  
SN54ALS32  
and  
SN54AS32  
are  
characterized for operation over the full military  
temperature range of 55°C to 125°C. The  
SN74ALS32andSN74AS32arecharacterizedfor  
operation from 0°C to 70°C.  
SN54ALS32, SN54AS32 . . . FK PACKAGE  
(TOP VIEW)  
FUNCTION TABLE  
(each gate)  
3
2
1
20 19  
18  
1Y  
NC  
2A  
4
5
6
7
8
4A  
NC  
4Y  
NC  
3B  
INPUTS  
OUTPUT  
Y
17  
16  
15  
14  
A
B
X
H
L
H
X
L
H
H
L
NC  
2B  
9 10 11 12 13  
NC – No internal connection  
logic symbol  
logic diagram (positive logic)  
1
1
1A  
2
1A  
2
3
6
8
1  
3
6
1Y  
2Y  
3Y  
4Y  
1Y  
2Y  
3Y  
4Y  
1B  
1B  
4
4
2A  
5
2A  
5
2B  
9
2B  
3A  
10  
3B  
12  
4A  
13  
4B  
9
3A  
8
10  
3B  
11  
12  
4A  
4B  
11  
13  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
Pin numbers shown are for the D, J, and N packages.  
Copyright 1994, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74AS32NSRG4 替代型号

型号 品牌 替代类型 描述 数据表
SN74AS32NSRE4 TI

完全替代

QUADRUPLE 2-INPUT POSITIVE-OR GATES
SN74AS32NSR TI

完全替代

QUADRUPLE 2-INPUT POSITIVE-OR GATES
DM74AS32SJX FAIRCHILD

功能相似

Quad 2-input OR Gate

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