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SN74ALS873BDWRG4 PDF预览

SN74ALS873BDWRG4

更新时间: 2024-12-01 15:52:07
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
18页 899K
描述
ALS SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO24, GREEN, PLASTIC, SOP-24

SN74ALS873BDWRG4 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP24,.4针数:24
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.54Is Samacsys:N
其他特性:WITH CLEAR系列:ALS
JESD-30 代码:R-PDSO-G24JESD-609代码:e4
长度:15.4 mm逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A湿度敏感等级:1
位数:4功能数量:2
端口数量:2端子数量:24
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP24,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
最大电源电流(ICC):31 mAProp。Delay @ Nom-Sup:14 ns
传播延迟(tpd):21 ns认证状态:Not Qualified
座面最大高度:2.65 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.5 mm
Base Number Matches:1

SN74ALS873BDWRG4 数据手册

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ꢀ ꢁꢂ ꢃ ꢄꢅ ꢀꢆ ꢇ ꢈ ꢉꢊꢋ ꢀꢁꢂ ꢃ ꢄ ꢀꢆ ꢇ ꢈ ꢄꢊꢋ ꢀꢁꢇ ꢃ ꢄ ꢅ ꢀꢆ ꢇ ꢈ ꢉꢊ ꢋ ꢀ ꢁꢇꢃ ꢄꢀ ꢆꢇ ꢈꢄ  
ꢌꢍꢄ ꢅꢋꢃ ꢎꢉ ꢏꢐ ꢋꢌꢎꢐ ꢑ ꢒꢓꢋ ꢅꢄꢐꢔ ꢕ ꢓꢀ  
ꢖ ꢏꢐ ꢕꢋ ꢈ ꢎꢀꢐꢄꢐ ꢓꢋ ꢗꢍ ꢐꢒ ꢍꢐ ꢀ  
SDAS036D − APRIL 1982 − REVISED AUGUST 1995  
SN54ALS873B, SN54AS873A . . . JT PACKAGE  
SN74ALS873B, SN74AS873A . . . DW OR NT PACKAGE  
(TOP VIEW)  
3-State Buffer-Type Outputs Drive Bus  
Lines Directly  
Bus-Structured Pinout  
1CLR  
1OE  
1D1  
1D2  
1D3  
1D4  
2D1  
2D2  
2D3  
V
CC  
1
2
3
4
5
6
7
8
9
24  
Package Options Include Plastic  
Small-Outline (DW) Packages, Ceramic  
Chip Carriers (FK), and Plastic (NT) and  
Ceramic (JT) DIPs  
23 1LE  
22 1Q1  
21 1Q2  
20 1Q3  
19 1Q4  
18 2Q1  
17 2Q2  
16 2Q3  
15 2Q4  
14 2LE  
13 2CLR  
description  
These dual 4-bit D-type latches feature 3-state  
outputs designed specifically for bus driving.  
These devices are particularly suitable for  
implementing buffer registers, I/O ports,  
bidirectional bus drivers, and working registers.  
2D4 10  
2OE 11  
GND 12  
The dual 4-bit latches are transparent D-type  
latches. While the latch-enable (LE) input is high,  
the Q outputs follow the data (D) inputs in true  
form, according to the function table. When LE is  
low, the outputs are latched. When the clear (CLR)  
SN54ALS873B, SN54AS873A . . . FK PACKAGE  
(TOP VIEW)  
input goes low, the  
Q
outputs go low  
independently of LE. The outputs are in the  
high-impedance state when the output-enable  
(OE) input is at a high logic level.  
4
3
2
1 28 27 26  
25  
1D2  
1D3  
1D4  
NC  
2D1  
2D2  
2D3  
1Q2  
1Q3  
1Q4  
NC  
2Q1  
2Q2  
2Q3  
5
6
7
8
9
24  
23  
22  
21  
20  
19  
The SN54ALS873B and SN54AS873A are  
characterized for operation over the full military  
temperature range of 55°C to 125°C. The  
SN74ALS873B  
and  
SN74AS873A  
are  
10  
11  
characterized for operation from 0°C to 70°C.  
12 13 14 15 16 17 18  
NC − No internal connection  
FUNCTION TABLE  
(each latch)  
INPUTS  
OUTPUT  
Q
CLR  
L
OE  
L
LE  
X
D
X
H
L
L
H
L
L
H
H
H
L
L
H
L
H
X
X
Q
0
H
X
X
Z
ꢐꢤ  
Copyright 1995, Texas Instruments Incorporated  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

SN74ALS873BDWRG4 替代型号

型号 品牌 替代类型 描述 数据表
SN74ALS873BNTE4 TI

完全替代

ALS SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDIP24, ROHS COMPLIANT, PLASTIC, DIP-24
SN74ALS873BDWRE4 TI

完全替代

Dual 4-Bit D-Type Latches With 3-State Outputs 24-SOIC 0 to 70
SN74ALS873BDWG4 TI

完全替代

ALS SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO24, GREEN, PLASTIC, SOP-24

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